CDM PTT delay after Channel Steering/ TXPL Inhib command #cdm


Duane KA1LM
 

I have been trying to get my link CDM1250 transmitter to drop PL transmit when its CWID occurs. I use a ID-O-Matic CWID and tried to run CWID PTT to the radio and the IDOM A3 pad that goes to 5V during ID, to the pin 6 TX PL INHIB function. No good! Also not good if I set chan1 as PL transmit and Chan 2 as no PL and have the IDOM A3 pin select chan 2 during the ID. 
I rigged up a test board with a CD4011 IC as a 0-500 mS delay generator. A manual switch puts +5V on the CDM pin 6 command pin, and starts the delay generator to hold off the CDM DATA PTT from 0-500mS after the pin 6 goes active.
My CDM1250 reliably requires 40 mS MINIMUM PTT delay AFTER the pin 6 command is toggled. 

Pin 6= TX PL INHIB: CDM DATA PTT <40 mS after pin 6 goes H, command ignored

Pin 6= CHAN SELECT (channel steering): CDM DATA PTT <40 mS after pin 6 goes H, LCD shows channel change, but radio speaker has error tone and no PTT.

SO.....the CDM1250 requires DATA PTT to be delayed >40 mS after the pin 6, etc function signal occurs.

Also noted: the ID-O-Matic CWID board has a built-in 250 mS delay of the CWID tone and A3 "High while ID" signal after it asserts transmit PTT.
Trying to use the A3 pin to inhibit the TX PL will not be practical as there would have to be a 250mS + 40 mS delay of the CDM pin 3 DATA PTT to have the A3 pin control the pin 6 TX PL INHIB function.

Logic needs to be pin 6 TX PL INHIB=H ...IF...CWID board PTT out is there with no link receiver COR (no user talking).
DATA PTT=L after 50 mS IF CWID keys AND link receiver is squelched. 

That was an interesting finding!
73,
Duane KA1LM


Bryan Fields
 

On 10/8/19 9:45 AM, Duane KA1LM wrote:
SO.....the CDM1250 requires DATA PTT to be delayed >40 mS after the pin 6,
etc function signal occurs.

Also noted: the ID-O-Matic CWID board has a built-in 250 mS delay of the
CWID tone and A3 "High while ID" signal after it asserts transmit PTT.
Trying to use the A3 pin to inhibit the TX PL will not be practical as
there would have to be a 250mS + 40 mS delay of the CDM pin 3 DATA PTT to
have the A3 pin control the pin 6 TX PL INHIB function.
So, why not have the ptt from the cwid board trigger a 555 monostable timer,
which in turn drives the radio ptt via a D flip-flop?

Logic:
1. CWID asserts ptt
2. this triggers the timer for a 50 ms delay
3. timer output goes low after delay, clocks the flip-flop
4. flip-flop asserts the PTT on the CDM
5. cwid ptt shuts off, and resets the flip-flop/timer

So now you have a delay in the ptt, would this work?


--
Bryan Fields

727-409-1194 - Voice
http://bryanfields.net


Bob M.
 

I ran into a similar issue using TX PL INH on a MaxTrac. Apparently they want you to set that line before you activate PTT, but if you activate it while the unit is already transmitting, it does turn the PL off but it also causes the TX to momentarily stop then continue. That little no-carrier glitch caused a brief squelch noise burst in the receiving radio that hadn't quite closed its own squelch yet because of the missing PL signal.

I ended up abandoning the internal TX PL INH and built my own circuit to shunt the PL signal to turn it off. The radio doesn't even know it's happening and there's no carrier turnoff glitch.

I suspect the channel steering also can't be done while the unit is transmitting, however I wouldn't expect a delay UNLESS you've got the channel steering accessory pins configured for any sort of debounce delay. I don't know if the CDM offers that but the MaxTrac, Radius, and GM300 do.

Bob M.