Topics

building Ody2


Marc olanie
 

Hi
I'd like to know
- which device should be soldered on the bottom side, between the TX out and the VNA in ? (the footprint is labeled "340" and is rather large)
- what is the value of the components located on the lower side (I imagine 100nF decoupling caps, 0603, 10 o 16V rated, but a confirmation would be perfect) 

FYI, the footprint of the "phone" jack has been modified. The front plastic centering pin cannot "sit" in its place and shoud be cut. Not very important, but should be corrected if a new run of pcb should be ordered. 
734
Marc






Marc olanie
 

To myself and I

"read the f... manual, you bonehead !" (it's a 340 Ohms 1W resistor, David specified it in the instruction list)

... and I used 100nF decoupling caps for the fpga, I doubt it will hurt anything :- D 

73'
Marc f6itu


dan edwards
 

on dit 'RTFM' n'est-ce pas??

ha ha 73, w5xz, dan


On Monday, September 16, 2019, 03:42:32 PM CDT, Marc olanie <Marc.olanie@...> wrote:


To myself and I

"read the f... manual, you bonehead !" (it's a 340 Ohms 1W resistor, David specified it in the instruction list)

... and I used 100nF decoupling caps for the fpga, I doubt it will hurt anything :- D 

73'
Marc f6itu


Marc olanie
 

>on dit 'RTFM' n'est-ce pas??

 

Definitely. Even in French :- ) If I received a quarter each time I had to repeat this mantra, I would be rich… incredibly rich

 

But, in my defence,  looking for  the value of a resistor (or discovering the fact that a resistor should be placed here) is generaly done by a schematic, not a manual :- o

 

Still some components to find (and a 1W resistor among them), and I will bug the list with more than stupid questions about the bootloader, firmware and gateware things.

 

73 to all

Marc f6itu


Marc olanie
 

Yet  another building question : 
where is located the 100k NTC ? 

Looking for it for more than 2 hours...  in vain
73'
Marc f6itu


Leo Goto
 

Hi Marc f6itu,

I think *T.
But I am not sure.
I attached photo.

Leo,


On Mon, 16 Sep 2019 23:52:08 -0700
"Marc olanie" <Marc.olanie@...> wrote:

Marc f6itu
--
Leo Gotoh <LeoGoto@...>
http://travelx.org


Marc olanie
 

Thanks Leo
That's what I though at first glance  (logically in the bias circuit, close to the RF Push-pull) 
I'll wait for a final confirmation from David
Tnks agn
Marc f6itu


David Fainitski
 

Hi
Yes,  that is right. Leo is odyssey's expert now. 


Marc olanie
 

Hi
While waiting for the last caps and my main oscillator... two other questions.

- On the "Ext. I/O" connector, SPI outputs, which "enable"  output has been chosen in the gateware ? TX or RX ? 
In other words, which part of the Alex protocol has been kept intact ? LPF and the 3 TX output, or HPF and the Xvtr/RX2/RX3/Bypass & external attenuator ? 
 
-  refl and fwd pwr on adc1 & adc2, I imagine, should be used in the same conditions needed by the hpsdr gateware (0/3.3v max for each input, control via PowerSDR.kisskonsole etc) 

This question just to know which filter I'll use, with which config and how I'll be able to control them
73'
Marc f6itu


Marc olanie
 

Thanks for the confirmation David. More questions to come :- ) 

Marc


David Fainitski
 

- On the "Ext. I/O" connector, SPI outputs, which "enable"  output has been chosen in the gateware ? TX or RX ? 
In other words, which part of the Alex protocol has been kept intact ? LPF and the 3 TX output, or HPF and the Xvtr/RX2/RX3/Bypass & external attenuator ?

If you want to use SPI control, here is the schematic of decoder

http://ody-sdr.com/wp-content/uploads/2017/09/SPI_decoder.jpg
Description of outputs here ( from SPI.v, firmware sources):

*****************************************

Modified by David Fainitski

for Odyssey-2 TRX project

2017

Bit       Function           I.C. Output

------ ------------             -----------

Bit 00 - 160 Meters LPF U1 - D0

Bit 01 - 80 Meters  LPF U1 - D1

Bit 02 - 60/40 Meters LPF U1 - D2

Bit 03 - 30/20 Meters LPF U1 - D3

Bit 04 - 17/15 Meters LPF  U1 - D4

Bit 05 - 12/10 Meters         U1 - D5

Bit 06 - 1.5 MHz HPF        U1 - D6

Bit 07 - 6.5 MHz HPF U1 - D7

Bit 08 - 9.5 MHz HPF    U2 - D0

Bit 09 - 13 MHz HPF         U2 - D1

Bit 10 - 20 MHz HPF        U2 - D2

Bit 11 - Bypass                U2 - D3

Bit 12 - 6M Preamp          U2 - D4

Bit 13 - ANT #2                  U2 - D5

Bit 14 - ANT #3                 U2 - D6

 

Bit 15 - Tx/Rx Relay           U2 - D7

This will work like Alex board control with the same cons. and pros.

Other way, you can use 7 User Outputs + ANT control pin and use filters which you want with no restrictions. Just install demultiplexer and have up to 127 control lines



On this screenshot, only 3 User Outputs and 7 control lines after demultiplexer enough for me for control my own LPF HPF

See the schematic https://easyeda.com/rolin791/HFPU-100

 


Marc olanie
 

Thanks a lot, David

In fact, that was not exactly the question. I was wondering which "branch" of the spi bus you chose, as the Alex protocol needs 2 Enable lines to be fully functional, and not only one. With only one, I'll have to butcher the cabling of my Alex frontend to fit the ody reassignment. 

This is not important anymore. I stoped working on this project, as the fpga 1.2V rail has a short to ground, and Sprint Layout is hardly able to give me the full equipotential. Without schematic, it would be quite impossible to find such a bug, and I don't imagine spending more money, buying a new board and a new fpga. 

Anyhow, a big thanks you to you, David. For your efforts, for your involvment in this project, and for your ideas. 
Wish you a nice week-end
Marc



David Fainitski
 

Hello,  Mark
1.2V bus shorting is a simple thing in the assembly process.  You don't need the schematic to find shortened blocking capacitor on the bottom or shortened FPGA balls.  Also checking the FPGA key is aligned properly to board's key. 


Reto HB9TRT
 

Hello David 

I made the first try. Loading MCU Firmware seems to work. So I press the button and the current rises up to 320mA. All voltage on the measure points are OK. All 4 Leds goes on. 
Loading fpga firmware seems also working. The log in the programmer are all OK no error. 
After programming also all leds are on. 
If I press the button, leads go's off and current is about 6mA. 

But the oled don't starts. I have only one from adafruit. But it has a connector for GND, 3.3V,5V,sda and sdc. I use 5V, GND, sda and sdc.

At the moment I have no idea what's wrong. 

Vy73 
Reto 






David Fainitski
 

Hello, Reto.
First of all, you have to run OLED display. If you have an oscilloscope chek lines SDA, SCL after power on by button.
Show me oscillograms if it is possible.


Reto HB9TRT
 
Edited

Hi David 
I'll habe a look with sprint viewer. Thanks for the hint. With altium I got also a reasonable picture so I could check the labels which ar on the pads. So far so good. This seems ok.

But I think there's a problem with the pic. It seems to work, I can Programm it without any errors. After that the ody starts. All measure points with the correct voltage and the tcxo shows me the correct frequency (10mhz and 25 mhz) 

But display is black. 

I have 5V on the voltage pin, but can't measure anything on the sdc sda pin with oscilloscope. 
The pic was the first chip I soldered. Manually. 
The other QFN I soldered with the Reflow station. The bga with oven. 

If there's a problem with the pic, is that possible all leds light up permanently. Power consume is 320mA if I start the ody by button. But if I understand correct, the button works only if the pic is OK.. 

If I plug a network cable to the ody and my notebook (peer to peer) I get a 1Gbits connection. I set the notebook to the 192.168.2.0/24 subnet (chose an ip like 192.168.2.111) and try to ping 192 168.2.160 and 161 nothing happens. I also had a look with Wireshark, there's network traffic but I can only see my own ip.

Firmware loading: this works only if the display goes on. This problem I have to find now.

I have to take the zip bootloader 2.11. There I take the MCU hex and Programm the pic. After that I start the ody take USB Blaster and Programm bootloader.pof to the fpga (also no error in the programming tool) than I use your bootloader gui in python (which works with Linux and python 2.0 (but not with 3.0) and can change the ip address if needed and program the firmware in slot1 for example. For programming the firmware I plug a headset into the key connector. And start the ody. If this correct, I had understood the procedure of programming. 

But there must be another problem. Mayby you have an idea how to search. 

Vy 73 
Reto 


David Fainitski
 

Hello, Reto.
As I told you before, first of all you have to run OLED display. No any sense to move ahead if you are not able to do the simplest thing.
In any case you need to check I2C lines to no contact, short cirquit, wrong soldered components.

You also have not answered me if you have a digital oscilloscope with memory or not ?  


Reto HB9TRT
 

Hello David, 

I wait until I have a working OLED. Maybe today I get one, I have a digital oscilloscope (Handteck DSO1200). 

Checking lines is not very easy withoput schematics. But I think it's no schematics for this project. 

I made the diode test with multimeter (+ pole to ground, - on the pin). and this was ok. Because nearly most IC's have a diode on the pins this works mostly. 

So I write again, if I have a OLED here and wait now with any experiments. 

vy 73
Reto


Reto HB9TRT
 

Hello David, 

As I hoped, the new OLED arrived today. And it works. 

1. I programmed MCU Firmware from Odyssey_BL_2.1 Archive
2. I Power Up the TRX
3. I get the Message "FPGA ERROR" on the OLED
4. I Programmed the File bootloder.pof from Odyssey_BL_2.1 Archive and use the guidlines from here: http://www.sdr-deluxe.com/publ/poshagovaja_instrukcija_po_smene_proshivki_v_odissee_ot_aleksa_k2bb/1-1-0-44
5. I start the TRX again: OLED: FPGA ERROR
6. I try with Headphone in Key plug: OLED: FPGA ERROR


Hmm, looks not good. 

FPGA Programming takes about 30 Seconds from start to finish. I think this is a bit too fast? In the picture of the guideline it takes 1.5 minutes. 

I also made some screenshots of the oscilloscope from the pins sda and sdc of the pic. But I think this is no more necessary, because the display works now. 

vy 73 Reto



 


David Fainitski
 

Hello, Reto.
That is bad news, seems like FPGA won't loading from memory.
Please make shure that 10k array next to flash memory is soldered well and also Verify bird is activated while you are programming  flash memory.