Re: Transistor S parameter measurements


Peter Ide-Kostic <on7yi.pik973@...>
 

This is very true. I forgot to say it, but before I connect the nanovna, I
am actually biasing the Transistor with a relatively high Idq current with
both input and output fixture ports either connected to 50 ohm loads,
shorted or open (so three tests). If no oscillation occurs, I take my
chance with the nanovna. I use a 3dB attenuator on the input and a 40dB
attenuator on the output. An oscillation will manifest itself by a sudden
increase of the drain current while the bias voltage on the gate is slowly
increased (as well of course as some noise or signal on the spectrum
analyzer.)

On Wed, 23 Sep 2020, 15:16 alan victor, <avictor73@...> wrote:

With regard to stability. After you build a test set and ready to take it
to your little vna to test... DO NOT!!!

Always initially test your DUT system first with 50 terminations on a
spectrum analyzer and carefully look for oscillations. Yes, pad the SA and
slowly remove pad to gain some dynamic range while searching for any
oscillation.

If you skip this step and you apply your unstable DUT to the vna and it
does oscillate you run the risk of taking out the channel 0 or ch 1 front
end.

I have seen this occur on many vna's in the past and the price you pay is
painful!!





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