Last edited · 2 revisions  


HP 82900A CP/M Module

This module was an optional add on for the 80 series computers.  Before the IBM PC architecture and its DOS operating system dominated the microcomputer market, CP/M was the most popular microcomputer operating system.  A wide variety of software, especially business applications, was available in CP/M versions that only ran on Intel 8080 and Zilog Z80 processors.  The 82900A CP/M module, also called the Auxiliary Processor module, is a complete Z80 system with 64K of RAM.  To run it the HP computer essentially became a terminal on the CP/M system.



Hardware Operation

Block diagram of module components (source: Hewlett Packard Journal, December 1982, pg. 10).

The Z80 processor starts operation after power up by running code from a 2K boot EPROM.  This code tests RAM then relocates itself into the top of the 64K RAM.  From there it commands the HP to read the CP/M operating system disk file, installs that in the upper part of the RAM and transfers execution to the operating system code.

Meanwhile, the HP automatically loads its own binary program from the disk and becomes the interface to the CP/M system.

The memory map of the module is:

(Source: HP Journal, pg 11.)

The 2K EPROM initially exists in the bottom of the memory map.  Once the Z80 makes its first I/O operation, the EPROM is disabled and its memory location is taken over by RAM.  When the Z80 does I/O, it lowers its /IORQ line.  This toggles a flip-flop attached to the EPROM /CE (chip enable) line.  Resetting the module resets the flip-flop and enables the EPROM at the base of the memory map.

The Translator chip is a modified version of the 1MB5 chip used in the optional I/O modules.  Here is one page of the schematic drawn by Bill Kotaska:

The 1MB5 Translator specification describes the bi-directional data bus and handshaking control used. There is a pair of data buffers (one for each direction of flow) and a pair of status buffers, for status and control information to flow in each direction.  The ALE, /IRD, and /IWR inputs to the 1MB5 determine how the bus on the Z80 side is connected to the various buffers.  Each of these is active when:

  • ALE when the Z80's  /IORQ (i.e., the Z80 is making an I/O request), /WR (the Z80 is outputting data) and A7 are active.
  • /IRD when  /IORQ, /RD (the Z80 is inputting data) and A6 are active.
  • /IWR when  /IORQ, /WR and A6 are active.

It appears the A6 and A7 lines are used to select whether the Z80 data bus communicates with data or status buffers.

In addition,  /CINT is an interrupt output to the Z80 when there is data ready for the Z80 to read, and /RST resets the Z80. 

The SCx lines are chip select lines that determine the I/O address the module occupies in the HP's memory map.  The hard-wired value is 011, which leads to the module having I/O addresses of 177506 (octal) for the status buffers and 177507 for the data buffers.