Topics

MS2000 MicroDos Development System

cellarcat
 

I have now built a MS2000 Microdos Development System and it is more or less running.  I wire wrapped the 18s605 CPU board and my own version of a control and display board with a couple of Scott’s breadboards, and have two 32k memory boards, and the 18s651 FDC, all plugged into a 10 slot backplane made up of two of Scott’s 5 plug units.  UT71 comes up and everything works except, wouldn’t you know it, the disk handling routines. I had a blank RCA 18S651 microboard which I populated and calibrated. The board is ridiculously complex and has enough optional connections to cause premature dementia but as far as I can tell it is properly set up and working but no luck with UT71. The FDC never issues any commands and the disk drives stay resolutely mute although the FDC is clearly running and I know the drives are OK. In fact I can output to Group 8 Out 4 and get the motor spinning and then there is an index pulse and read data. I am even using the original full height 3.5 inch 720K drives with the 40 pin edge connector. Much better made than the subsequent and smaller offspring.  My control and display board has a hardware break point and allows single stepping and I have followed the code down to the Seek routine. It seems to go astray at 85DAH when it checks for “normal termination” whatever that is. The status register returns 80H which from my reading of the u765 data sheet indicates an illegal command. I am a hardware guy and do not claim any great expertise with the software. I can generally follow it but not to the point of understanding all the ins and outs with the register contents etc. I am using the version of UT71 from Marcel’s EMMA II as that gives a correct CRC reading. I was using Herb’s version but the TEST routine comes back with the message “BAD ROM”. Anybody got any ideas because I have exhausted my own.

ajparent1/kb1gmx
 

If the 765 is in Idle mode the LES on the drive should glow but not full brightness.
Its the 765 doing drive scan for condition change and should be observed.

765 and kin all work the same way.  

Idle phase >>> command phase >>> action(read/write/seek) >>>
status phase >>> idle phase.

NOTE if you read to many bytes in idle it thing its getting a command or
something else.

General procedure is:

Enable motors
  wait a few seconds to come up to speed
Send a recalibrate command to get to the right track
  Heads should seek to 000
  status when done should be that 000 was found
Send seek command
  heads will move to selected position.
  again status should indicate command complete and a
   readstatus should get detailed status.

All of the above can be done with what every peak and poke utility as
DMA is not needed (no data transfered).

If you get this far you have done good.  Do all testing to this point with blank media!
you want the boot media write protected when you finally get to it.

However the board has more jumpers that is reasonable and the drives 
also have a lot of jumpers including drive select.  If either of the two are
wrong insanity is a reasonable defense.

Oh, normal termination is command completed and not significant errors
indicated from the recovered status bytes.

As to addresses and further data I don't have source that makes full sense.

Allison

cellarcat
 

Thanks for the response, Allison! The LED does glow briefly so the drive is being accessed. One problem is that UT71 never turns on the motor although I can do it directly by loading port 4 with bit 3 turned on - out 08. The motor comes on and then times out after a few seconds. I can also turn the motor on by removing a link on the board but the heads never move and there does not appear to be any attempt to read. The end result is always the same - that useless error message “MICRODOS NOT LOADED”. 

On Dec 1, 2019, at 4:00 PM, ajparent1/kb1gmx <kb1gmx@...> wrote:

If the 765 is in Idle mode the LES on the drive should glow but not full brightness.
Its the 765 doing drive scan for condition change and should be observed.

765 and kin all work the same way.  

Idle phase >>> command phase >>> action(read/write/seek) >>>
status phase >>> idle phase.

NOTE if you read to many bytes in idle it thing its getting a command or
something else.

General procedure is:

Enable motors
  wait a few seconds to come up to speed
Send a recalibrate command to get to the right track
  Heads should seek to 000
  status when done should be that 000 was found
Send seek command
  heads will move to selected position.
  again status should indicate command complete and a
   readstatus should get detailed status.

All of the above can be done with what every peak and poke utility as
DMA is not needed (no data transfered).

If you get this far you have done good.  Do all testing to this point with blank media!
you want the boot media write protected when you finally get to it.

However the board has more jumpers that is reasonable and the drives 
also have a lot of jumpers including drive select.  If either of the two are
wrong insanity is a reasonable defense.

Oh, normal termination is command completed and not significant errors
indicated from the recovered status bytes.

As to addresses and further data I don't have source that makes full sense.

Allison

bill rowe
 

Exceptionally cool! Good luck. Could you use a logic analyzer to monitor I/o to the drive board (or the instruction address) and compare that to the emulator?

On Dec 1, 2019, at 3:47 PM, cellarcat <petelco@...> wrote:



I have now built a MS2000 Microdos Development System and it is more or less running.  I wire wrapped the 18s605 CPU board and my own version of a control and display board with a couple of Scott’s breadboards, and have two 32k memory boards, and the 18s651 FDC, all plugged into a 10 slot backplane made up of two of Scott’s 5 plug units.  UT71 comes up and everything works except, wouldn’t you know it, the disk handling routines. I had a blank RCA 18S651 microboard which I populated and calibrated. The board is ridiculously complex and has enough optional connections to cause premature dementia but as far as I can tell it is properly set up and working but no luck with UT71. The FDC never issues any commands and the disk drives stay resolutely mute although the FDC is clearly running and I know the drives are OK. In fact I can output to Group 8 Out 4 and get the motor spinning and then there is an index pulse and read data. I am even using the original full height 3.5 inch 720K drives with the 40 pin edge connector. Much better made than the subsequent and smaller offspring.  My control and display board has a hardware break point and allows single stepping and I have followed the code down to the Seek routine. It seems to go astray at 85DAH when it checks for “normal termination” whatever that is. The status register returns 80H which from my reading of the u765 data sheet indicates an illegal command. I am a hardware guy and do not claim any great expertise with the software. I can generally follow it but not to the point of understanding all the ins and outs with the register contents etc. I am using the version of UT71 from Marcel’s EMMA II as that gives a correct CRC reading. I was using Herb’s version but the TEST routine comes back with the message “BAD ROM”. Anybody got any ideas because I have exhausted my own.


--
Bill Rowe
Olduino - an arduino for the first of us
https://olduino.wordpress.com/about-2/about/

David Schultz
 

On 12/1/19 2:46 PM, cellarcat wrote:
I have now built a MS2000 Microdos Development System and it is more or
less running.  I wire wrapped the 18s605 CPU board and my own version of
a control and display board with a couple of Scott’s breadboards, and
have two 32k memory boards, and the 18s651 FDC, all plugged into a 10
slot backplane made up of two of Scott’s 5 plug units.  UT71 comes up
and everything works except, wouldn’t you know it, the disk handling
routines. I had a blank RCA 18S651 microboard which I populated and
calibrated. The board is ridiculously complex and has enough optional
connections to cause premature dementia but as far as I can tell it is
properly set up and working but no luck with UT71. The FDC never issues
any commands and the disk drives stay resolutely mute although the FDC
is clearly running and I know the drives are OK. In fact I can output to
Group 8 Out 4 and get the motor spinning and then there is an index
pulse and read data. I am even using the original full height 3.5 inch
720K drives with the 40 pin edge connector. Much better made than the
subsequent and smaller offspring.  My control and display board has a
hardware break point and allows single stepping and I have followed the
code down to the Seek routine. It seems to go astray at 85DAH when it
checks for “normal termination” whatever that is. The status register
returns 80H which from my reading of the u765 data sheet indicates an
illegal command. I am a hardware guy and do not claim any great
expertise with the software. I can generally follow it but not to the
point of understanding all the ins and outs with the register contents
etc. I am using the version of UT71 from Marcel’s EMMA II as that gives
a correct CRC reading. I was using Herb’s version but the TEST routine
comes back with the message “BAD ROM”. Anybody got any ideas because I
have exhausted my own.
The UT71 self test can miss a lot of errors because it is a simple 8 bit
checksum. On the other hand, UT71 works with the 765 sim I wrote. It has
been a while since I have thought about this but I will try to help.

Motor on is controlled by writing the correct value using OUT 4.
(Correct in this case being a zero in the third bit.) There is a timer
that will reset this if the FDC isn't accessed.

You didn't say exactly how you got to that point in the SEEK routine. I
have to assume it was as a result of issuing the load MicroDOS command.
The first thing that does (LOAD1:) is issue a recalibrate command.

SEEKA is called and whenever track 0 is called for it issues a
recalibrate command. It puts some data into a RAM buffer at 8F00H
(including DMANOP which is sent using OUT 4) and then calls CMD and WAIT
to issue the command and read the results. (Seeks have no results so a
Sense Interrupt Status command is slipped in by WAIT.)

I really can't see any way to get to 85DAH without sending DMANOP using
OUT 4 (at 84EDH) so the motor should be on. At least until the CD4060
times out and clears it.

When you say "status register" you have to be careful. There is the
status register as read via an INP 4 and there is the status returned in
the results.

Is the jumper to route the INT pin of the 765 to EF3 connected? If not,
then WAIT will time out and stuff 80H into the results buffer.

--
https://web.archive.org/web/20190214181851/http://home.earthlink.net/~david.schultz/
(Web pages available only at the Wayback Machine because Earthlink
terminated that service.)

ajparent1/kb1gmx
 

I've not played with UT71 as yet.  The listings I have are rather vague where
it applies to FDC and some of the IO.  Docs, well no, info there.

All of my experience is with the part in 8085/z80/z280/pdp-11 space not
that changes how it works.  Also back when I worked for NEC it was
"the part" and I was a product engineer.  Also one of the first to wrap
a S100 card for it and Multibus while using the upB205 gate array to
replace the floppy side glue chips.   So any questions on the part I
know, UT71 subroutine names, nada.

So the base case I have is the Compupro S100 controller as it has DMA and 
I can sit there with a monitor and poke stuff at it and watch it do its thing.
Makes it easy to answer what happens if...?  As the commands are OS
and CPU invariant.    When I mean status I mean the command-status
address,  however that can also be applied to sense-status command
that gives a handfull of bytes.  I can be much more specific if I pull out
my apnotes and data sheets from back then.

The usual sequence outlined was very brusk and cut to the minimum and 
generally there are details if gotten wrong result in pain.  I assume that
UT71 does the right things or at least did.  Sims cannot be counted to
behave identically to hardware.

Also the 9266 and 37C65 and similar may or do have additional register
not in the 765 to setup clock and data rates plus PC specific actions.
As they were developed for that environment.  

AS to the INT/EF3 Unknown as that's specific to the system and software.

Allison

ajparent1/kb1gmx
 

If the motor doesn't come on for UT71 I'd suspect you have a jumper wrong
for drive addressing on the board or the drive.  Floppies were a PITA for all
that.

Also if the motor is on and never moves likely the drive is not commanded
(addressed!).

All of the non data transfer commands can be tested from monitor by poking
the command and its databytes at the controller and waiting the drive then
after time sending a sense status command and fetching the bytes by hand
one at a time.

Never needed a logic analyzer for that a bunch of leds and resistors were enough
as everything but data transfers are slow events.  Fast events a logic probe was enough.

Allison

ajparent1/kb1gmx
 

One last thing.... Do not use the PC floppy cable with the twisted section.
That was a PC unique creation. 

Older machines used straight cables and depended on drive jumpers
for select and all.

So using the strange cable would mess up your day!

Allison

ajparent1/kb1gmx
 

Let me know what version of UT71 is being used and where I can find matching
source (or disassembly).

Allison

cellarcat
 

The most useful for me, disassembled version, is Dave Schultz’s from 1983 which was a conversion from ASM8 to A18. Herb also has a hex and disassembled version on his web site. 

On Dec 2, 2019, at 1:26 PM, ajparent1/kb1gmx <kb1gmx@...> wrote:

Let me know what version of UT71 is being used and where I can find matching
source (or disassembly).

Allison

cellarcat
 

I made my own cable and it certainly doesn’t twist! Actually you have to make your own cable as the header on the board is 50 pin and from there goes down to whatever size is needed for the drive you are using. My 3.5 inch drive is an early model with a 40 pin edge card connector. It came from an IBM PS2 and I have the exact pinout for it. There is only one jumper on the board other than the drive select.

On Dec 2, 2019, at 1:19 PM, ajparent1/kb1gmx <kb1gmx@...> wrote:

One last thing.... Do not use the PC floppy cable with the twisted section.
That was a PC unique creation. 

Older machines used straight cables and depended on drive jumpers
for select and all.

So using the strange cable would mess up your day!

Allison

cellarcat
 

Hi, Dave! I got to the seek routine by setting a breakpoint there and then single stepping. I was trying to load MicroDos. I checked the ram at 8F00 and the requisite bytes were loaded there for the commands. Your comment about getting to 85DA without sending DMANOP is very interesting. I am going to check further into that. The jumper for the interrupt line to EF3 is in place.

On Dec 2, 2019, at 11:55 AM, David Schultz <david.schultz@...> wrote:

On 12/1/19 2:46 PM, cellarcat wrote:
I have now built a MS2000 Microdos Development System and it is more or
less running.  I wire wrapped the 18s605 CPU board and my own version of
a control and display board with a couple of Scott’s breadboards, and
have two 32k memory boards, and the 18s651 FDC, all plugged into a 10
slot backplane made up of two of Scott’s 5 plug units.  UT71 comes up
and everything works except, wouldn’t you know it, the disk handling
routines. I had a blank RCA 18S651 microboard which I populated and
calibrated. The board is ridiculously complex and has enough optional
connections to cause premature dementia but as far as I can tell it is
properly set up and working but no luck with UT71. The FDC never issues
any commands and the disk drives stay resolutely mute although the FDC
is clearly running and I know the drives are OK. In fact I can output to
Group 8 Out 4 and get the motor spinning and then there is an index
pulse and read data. I am even using the original full height 3.5 inch
720K drives with the 40 pin edge connector. Much better made than the
subsequent and smaller offspring.  My control and display board has a
hardware break point and allows single stepping and I have followed the
code down to the Seek routine. It seems to go astray at 85DAH when it
checks for “normal termination” whatever that is. The status register
returns 80H which from my reading of the u765 data sheet indicates an
illegal command. I am a hardware guy and do not claim any great
expertise with the software. I can generally follow it but not to the
point of understanding all the ins and outs with the register contents
etc. I am using the version of UT71 from Marcel’s EMMA II as that gives
a correct CRC reading. I was using Herb’s version but the TEST routine
comes back with the message “BAD ROM”. Anybody got any ideas because I
have exhausted my own.

The UT71 self test can miss a lot of errors because it is a simple 8 bit
checksum. On the other hand, UT71 works with the 765 sim I wrote. It has
been a while since I have thought about this but I will try to help.

Motor on is controlled by writing the correct value using OUT 4.
(Correct in this case being a zero in the third bit.) There is a timer
that will reset this if the FDC isn't accessed.

You didn't say exactly how you got to that point in the SEEK routine. I
have to assume it was as a result of issuing the load MicroDOS command.
The first thing that does (LOAD1:) is issue a recalibrate command.

SEEKA is called and whenever track 0 is called for it issues a
recalibrate command. It puts some data into a RAM buffer at 8F00H
(including DMANOP which is sent using OUT 4) and then calls CMD and WAIT
to issue the command and read the results. (Seeks have no results so a
Sense Interrupt Status command is slipped in by WAIT.)

I really can't see any way to get to 85DAH without sending DMANOP using
OUT 4 (at 84EDH) so the motor should be on. At least until the CD4060
times out and clears it.

When you say "status register" you have to be careful. There is the
status register as read via an INP 4 and there is the status returned in
the results.

Is the jumper to route the INT pin of the 765 to EF3 connected? If not,
then WAIT will time out and stuff 80H into the results buffer.

-- 
https://web.archive.org/web/20190214181851/http://home.earthlink.net/~david.schultz/
(Web pages available only at the Wayback Machine because Earthlink
terminated that service.)


cellarcat
 

Thanks, Bill! I do have a logic analyzer and hooking it up to the drive lines is on my list. 

On Dec 2, 2019, at 6:45 AM, bill rowe <bill_rowe_ottawa@...> wrote:

Exceptionally cool! Good luck. Could you use a logic analyzer to monitor I/o to the drive board (or the instruction address) and compare that to the emulator?

On Dec 1, 2019, at 3:47 PM, cellarcat <petelco@...> wrote:


I have now built a MS2000 Microdos Development System and it is more or less running.  I wire wrapped the 18s605 CPU board and my own version of a control and display board with a couple of Scott’s breadboards, and have two 32k memory boards, and the 18s651 FDC, all plugged into a 10 slot backplane made up of two of Scott’s 5 plug units.  UT71 comes up and everything works except, wouldn’t you know it, the disk handling routines. I had a blank RCA 18S651 microboard which I populated and calibrated. The board is ridiculously complex and has enough optional connections to cause premature dementia but as far as I can tell it is properly set up and working but no luck with UT71. The FDC never issues any commands and the disk drives stay resolutely mute although the FDC is clearly running and I know the drives are OK. In fact I can output to Group 8 Out 4 and get the motor spinning and then there is an index pulse and read data. I am even using the original full height 3.5 inch 720K drives with the 40 pin edge connector. Much better made than the subsequent and smaller offspring.  My control and display board has a hardware break point and allows single stepping and I have followed the code down to the Seek routine. It seems to go astray at 85DAH when it checks for “normal termination” whatever that is. The status register returns 80H which from my reading of the u765 data sheet indicates an illegal command. I am a hardware guy and do not claim any great expertise with the software. I can generally follow it but not to the point of understanding all the ins and outs with the register contents etc. I am using the version of UT71 from Marcel’s EMMA II as that gives a correct CRC reading. I was using Herb’s version but the TEST routine comes back with the message “BAD ROM”. Anybody got any ideas because I have exhausted my own.

--
Bill Rowe
Olduino - an arduino for the first of us
https://olduino.wordpress.com/about-2/about/

ajparent1/kb1gmx
 

Thanks for the code pointer... 

The 50 pin was likely a direct fit for FD800/850 8" drive.

FYI depending on the vintage for the floppy drives used that can be source of troubles.

Some of the newer 5.25 and especially 3,5" drives wanted the twisted cables as the
drive level jumper were eliminated or greatly restricted.

When playing with floppies for old school full height 5.25 I use TM100s, or FD400.
When I need a 5.25 that is very flexible and good for 40 Track the half height
FD55B is used and if I need all the 5.25" possible features the FD55GFR as it will
do 80 tracks, two sides and high speed or low speed motor for the really odd
formats.  For 1984ish the drive of choice would be the TM100.

3.5" we will ignore for now. ;)

Allison

David Schultz
 

On 12/2/19 1:37 AM, cellarcat wrote:
Thanks for the response, Allison! The LED does glow briefly so the drive
is being accessed. One problem is that UT71 never turns on the motor
although I can do it directly by loading port 4 with bit 3 turned on -
out 08. The motor comes on and then times out after a few seconds.
The motor should turn on when bit 3 is zero. At least that is what UT71
expects. Try as I might, I cannot change those zeroes to eights in the
manual. (Scanned or hard copy.)

But the schematic says:

U3 (2 input NAND) inverts the MOTON-P signal to drive the active low
signal to the drive.

MOTON-P is the output of an inverter (U22) which gets its input from the
inverted output of a CD4013. So three inversions which means that the
bit written to the CD4013 should be high.

But none of the values used by UT71 have that bit set. Since you can
turn the motor on with bit 3 set that means that the UT71 listing is
incorrect rather than the schematic. You will have to set bit 3 in the
following:


DMANOP EQU 00H ;NO DMA OPERATION
CRCREAD EQU 01H ;CRC READ
DMAO EQU 02H ;DISK WRITE
DMAI EQU 03H ;DISK READ-

Don't touch the definition of DMA in the preceding line as that is an
argument for the SPECIFY command.

Given that there is one error in the UT71 listing you will have to
expect more.

--
https://web.archive.org/web/20190214181851/http://home.earthlink.net/~david.schultz/
(Web pages available only at the Wayback Machine because Earthlink
terminated that service.)

ajparent1/kb1gmx
 

U3 motion is not motor!  Its head direction, fault reset (8") , low current (most 8")

The header near u3 on page25 is suspect.  if Pin8 of U3 is wired for motor on
then pins 10 and 9 must go to the control port for motor on (motion-p page 23)
U22pin 10.   That is bit 3 on the bus and latched by a OUT4CL-N.

Could N0,1,2 from the CPU be mis-wired?? The only reset to that is loading a zero 
CLEAR-N from pin 9 on the connector ( I believe that is the CLEAR, power on reset
from the CPU board).  I see no timeout for motors.

OBTW... from the days of ap/product engineering they also had a second and
much less complex FDC board.  Never knew if it made it to production.

cellarcat
 

Fascinating… and disconcerting! I have found errors in other RCA Microboard schematics but not the FDC so far. I will change the code and see what happens..

On Dec 2, 2019, at 2:35 PM, David Schultz <david.schultz@...> wrote:

On 12/2/19 1:37 AM, cellarcat wrote:
Thanks for the response, Allison! The LED does glow briefly so the drive
is being accessed. One problem is that UT71 never turns on the motor
although I can do it directly by loading port 4 with bit 3 turned on -
out 08. The motor comes on and then times out after a few seconds.
The motor should turn on when bit 3 is zero. At least that is what UT71
expects. Try as I might, I cannot change those zeroes to eights in the
manual. (Scanned or hard copy.)

But the schematic says:

U3 (2 input NAND) inverts the MOTON-P signal to drive the active low
signal to the drive.

MOTON-P is the output of an inverter (U22) which gets its input from the
inverted output of a CD4013. So three inversions which means that the
bit written to the CD4013 should be high.

But none of the values used by UT71 have that bit set. Since you can
turn the motor on with bit 3 set that means that the UT71 listing is
incorrect rather than the schematic. You will have to set bit 3 in the
following:


DMANOP EQU 00H ;NO DMA OPERATION
CRCREAD EQU 01H ;CRC READ
DMAO EQU 02H ;DISK WRITE
DMAI EQU 03H ;DISK READ-

Don't touch the definition of DMA in the preceding line as that is an
argument for the SPECIFY command.

Given that there is one error in the UT71 listing you will have to
expect more.

--
https://web.archive.org/web/20190214181851/http://home.earthlink.net/~david.schultz/
(Web pages available only at the Wayback Machine because Earthlink
terminated that service.)


ajparent1/kb1gmx
 

Also in the listing there are many:

   ;WAIT FOR ROM

it should be

;WAIT FOR RQM

That is RQM or wait for the RQM (wait for request from master)
to synchronize the data transfer for  commands and reading status bytes.
It is found as bit 7 of the main status register (not status bytes response).

So RQM has to be valid before you can tell or ask the FDC anything.

I have C, 8080 and Z80 code for that.

Also page 7 bottom covers MOTON.

ajparent1/kb1gmx
 

I cannot yet find any reference in UT71 to turn on the motor regardless
of the bits used.

Where in the code is it?

David Schultz
 

On 12/2/19 4:25 PM, ajparent1/kb1gmx wrote:
I cannot yet find any reference in UT71 to turn on the motor regardless
of the bits used.
In the code for CMD there is an OUT DMASEL. (DMASEL EQU 4) This outputs
a byte put into the command buffer by the calling function. It will be
one of the values previously mentioned. (DMANOP, CRCREAD, DMAO, or
DMAI). There is no mention of the motor on function in the listing. It
just happens by magic. :-)

There are just two other instances of an OUT DMASEL and they use inlined
values to output. (CRCREAD and DMANOP)

--
https://web.archive.org/web/20190214181851/http://home.earthlink.net/~david.schultz/
(Web pages available only at the Wayback Machine because Earthlink
terminated that service.)