The 18series board was developed off the early NEC apnote. I pounded on them (RCA back then) to
jump to the digital data separator that was much lower in parts count and NO adjustments.
Same for the other suggestion (DMA selection). I believe they eventually did but have no
documents to say.
Any who yes 9266 and later 37C65 series parts made the whole mess as small as one chip (37C65).
One thing the logic to determine DMA-in or DMA-out is simplified if you use the WRITE signal out
(pin25 FDC WE) of the FDC. Then you need no logic hardware of software to control DMA direction.
Also programming for FDC for PIO is nearly out of the range of what 1802 can do fast enough
unless clocked very fast. The DMA interface is used for that and PIO only for command and status.
FYI: the FDC running at DD high rate formats will want or spit a byte every 16uS during write or
read to media, the slowest format (SD 5.25) also being the least dense is 64us per byte. Failure
to do that results in underrun/overrun as the FDC has minimal buffering and if that happens that sector is trashed.
Interrupt is not required. You can test EF-x or even poll the status register.
Programming hint. To read only one sector without TC all that is needed is when writing
command string is that the start sector is equal to end sector. It will complete with end
of track(not really an error).
FYI the number of commands actually needed are less than 100%, some are really not that useful.
as a result its possible to create simpler software.
BTDT, have the full outfit on multiple CPUs.