Re: RCA COS/MOS versus CMOS
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Not to toot my own horn, but you might be interested in this article about the 1802 I wrote for IEEE Spectrum's Chip Hall of Fame, which discusses it's dual chip origins:
Fairchild couldn't make CMOS technology work reliably because they couldn't figure how to stop them degrading due to mobile ions. Looking deeper into RCA's history via this article (IEEE Xplore subscription required, alas):
from the article it appears that RCA was working along a parallel track to Fairchild and had a great deal of its own IP, although it is silent on whether or not they licensed the Fairchild CMOS patent to avoid litigation: it says:
...Several years later, Johnson teamed with another RCA researcher, Torkel Wallmark, to design a shift register, again integrated in a block of germanium. Their patent, filed on 25 March 1958,7 illustrated two very different embodiments of a shift register: one using the thyristor8 and the other using a unipolar junction transistor (UJT) as the active shifting elements. Both the thyristor and the UJT were novel semiconductor devices that were attracting wide industry attention. Also known as a field-effect transistor (FET), the UJT had been described in 1953 by G.C. Dacey and I.M. Ross at Bell Labs.9 At RCA, researchers such as Charlie Mueller, Loy Barton, and Jack Hilibrand worked on the thyristor as a stand-alone switching device.8 The UJT shift register was the particular interest of Wallmark. Nevertheless, by 1961, Wallmark and Sanford Marcus, under an Air Force contract, extended the early work by Johnson and Wallmark on the thyristor-based shift register and published their results that year.7 In this publication, Wallmark and Marcus described detailed electrical measurements of a thyristorbased shift register that they had built.10 In both the thyristor- and UJT-based shift registers, multiple active devices were created in and connected through a single piece of semiconductor material to create the shiftregister circuit.
In the second half of the 1950s, Torkel Wallmark began to investigate the use of the UJT as a single, basic component for creating digital circuits. Wallmark envisioned integrated blocks of silicon UJTs, with segments of the silicon substrate employed as resistors. With silicon UJTs and resistors, he could create direct-coupled transistor logic (DCTL) circuits, a form of digital circuit that was then popular in high-speed and military transistorized computers. Wallmark and Marcus termed their new digital circuits direct-coupled unipolar transistor logic (DCUTL).11,12 Wallmark was well aware of the need for microminiaturization and integration. In his paper published in 1960 (submitted in 1959), he stated, ‘‘It is concluded that the considerable advantage of integrated devices compared to conventional devices, such as very small volume and weight, and reduced number of metallic connections, has to be paid for by higher shrinkage in fabrication.’’13 By ‘‘shrinkage,’’ he means the increased probability for defects and reduced yields when making integrated devices. The UJT pursued by Wallmark in the second half of the 1950s was a field-effect device in which the voltage on a gate electrode controlled the flow of current across a channel separating a source and drain regions. In this same period, Wallmark contemplated another form of FET that he described in a patent for it filed on 28 February 1957.14 Although the patent describes a germanium transistor, Wallmark described the ‘‘modern’’ metal-oxide-semiconductor (MOS) transistor, which later became the predominant transistor component used in ICs from the 1970s to today. ...
Wallmark later modestly said of the MOSFET invention in an oral history, I’m not aware of any application like it. The patent became important when silicon came out because the patent was written in such a way that it covered a semiconducting device with a single element and with an oxide made from the single element itself. This applied also to silicon. So it happened to become very important for the silicon case.15 Wallmark further said, ‘‘Yes. But then the MOS transistor came about, Steve Hofstein came around and said he had gone to the Patent Department trying to patent this new transistor and found that I had the patents on one of the basic parts—the native oxide layer on the silicon.’’15 Wallmark’s early work on the MOS transistor took on renewed importance for RCA and its researchers such as Steve Hofstein in the early 1960s in their efforts to create ICs with MOSFETs. Around 1958, Wallmark began to collaborate with Sanford Marcus from the RCA Defense Electronic Products Division on UJT ICs. In a paper given at the Solid-State Circuits Conference in February 1959 and subsequently published in its entirety in the June 1959 issue of the IRE Transactions on Electronic Computers, 12 Wallmark and Marcus revealed a variety of IC configurations that were possible using the UJT. Their disclosures relative to logic functions implemented in ICs included inverters, AND gates, NOR gates, half-adders, and ‘‘complementary symmetry’’ memory circuits. For example, Figure 4 shows the AND configuration. Wallmark and Marcus’ DCUTL IC concepts were replicated in RCA’s first MOS circuit designs a few years later. Virtually the same configuration as the one in Figure 4 was used later in complementary MOS (CMOS) and in IC designs for n-channel MOS (NMOS) transistors in a NAND gate. In addition to the disclosure of various forms of DCUTL ICs in their 1959 paper, Wallmark and Marcus described a complex UJT integrated shift-register element in a later patent (see Figure 5).16 This patent was an extension of Wallmark and Johnson’s earlier integrated shift-register patent of March 19587 and was filed just a few months later. Wallmark, along with his coworker on UJTs, Herbert Nelson, disclosed an even more complex DCUTL function, an integrated switching matrix used to address computer memory locations, in their patent filed on 21 August 1958 (see Figure 6).17 Wallmark was responsible for device design, and Nelson is credited with fabricating the semiconductor devices. In addition to the relatively high degree of integration represented by this switching matrix, Wallmark and Nelson’s approach embodied the two basic approaches to electrical isolation of components in semiconductor ICs: physical isolation and PN junction isolation. Isolating circuit components from each other was one of the central challenges of semiconductor ICs. The air gap created by trenches (marked 82 in Figure 6) provided electrical isolation between the gates in one lateral direction. Reversed-biased PN junctions (marked 86) provided the isolation of gates in the perpendicular direction. Approximately one month after the RCA patent filing, Jack Kilby built his first oscillator and amplifier circuits also using a physicalisolation approach. PN junction isolation was pursued by Kurt Lehovec at Sprague and Robert Noyce at Fairchild in early 1959. Kilby and Lehovec employed the same flying wire bonding connections shown on the Wallmark UJT drawings. In January 1959, TI patent attorneys learned that RCA was moving toward an IC patent and scrambled to put together applications in Kilby’s name.
Paul Weimer, a PhD physicist at RCA Laboratories, began researching thin-film approaches to creating ICs in 1960. Weimer thought that if he could make an active device utilizing thin-film technology, thin-film ICs would be cheaper than in silicon. Thin-film resistors and capacitors were already known in the art. What was needed was a compatible thinfilm transistor (TFT) for making all thin-film ICs. This thinking led Weimer to the insulated gate TFT. Weimer’s TFT was similar in form to Wallmark’s FET of 1957. Weimer was on a fast track and announced the TFT using a semiconductor film of cadmium sulfide (CdS) in the IRE Transactions on Electron Devices in the fall of 1961.19 In a patent filed on 17 August 1961,20 Weimer disclosed details of his TFT that gave him the distinction of being the inventor of the TFT. His primacy was recognized by his peers at IBM.21 As Figure 7 shows, they identified two structures for the TFT. In the upper drawing, the source and drain, 12 and 14, are below the semiconductor film, and in the lower drawing, the source and drain were on the top surface of the semiconductor film. In both cases, a metal gate separated from the semiconductor by an insulating layer controlled the current flow from the source to the drain through the semiconductor film. Interestingly, source and drain were called cathode and anode in this patent, a throwback to the vacuum-tube nomenclature. Weimer’s subsequent publications and patents use the terms source and drain. In Weimer’s 1961 patent, the possible semiconductor thin films were listed as ‘‘germanium, silicon, the phosphides, arsenic, antimonides of aluminum, gallium, and indium, sulphides, selenides, and tellurides of zinc and cadmium.’’ Weimer was able to build both p- and n-channel TFTs in a common circuit on the same substrate by depositing a region of p-type semiconductor material and a region of n-type. In his patent filed in May 1962,22 Weimer shows a complementary TFT flipflop with p- and n-channel transistors. This is the TFT equivalent of an integrated silicon CMOS flip-flop. Weimer notes in his patent that his complementary flip-flop used no power except when switching between states. In his TFT IC, the transistors labeled 268 and 266 in Figure 8 are p-channel devices, and the transistors labeled 262 and 264 are n-channel devices. The page from Weimers notebook in Figure 9 shows the complementary TFT flipflop invention dated 9 May 1962.
Weimer moved quickly to patent his TFTbased complementary logic. He filed this patent on 31 May 1962, while his laboratory notebook entry showing the complementary flip-flop is dated 9 May 1962.4 Weimer’s work on his complementary TFT IC took place nine months before Frank Wanlass and C.T. Sah of Fairchild Semiconductor presented their classic silicon CMOS IC paper at a conference in February 1963. Although Weimer claimed the flip-flop with complementary logic in his 1962 patent,22 it appears that he did not realize the full potential of his invention. All the TFT ICs in the patent were based on complementary inverter configurations, not the more complex complementary logic such as NAND and NOR gates. Wanlass and Sah used a more complete set of complementary logic functions using silicon CMOS.23 In 1995, Ross Bassett interviewed Frank Wanlass, and from that interview, he reported in his book, To the Digital Age, that ‘‘Wanlass’ idea for work on the MOS transistor came from an analogy to Paul Weimer’s thin-film work done at RCA.’’18 This shared interest in insulated-gate FETs led both Weimer at RCA and Wanlass and Sah at Fairchild to propose complementary logic ICs within a year of one another. Beyond complementary logic, Weimer recognized in a 1962 paper that his TFT ICs could form more complex logic elements such as the NOR and AND (NAND) gates. (Figure 10 shows these gates.) In this same paper, Weimer described a three-stage TFT amplifier.24 His linear configuration is similar to that used in present-day analog MOS ICs, underlining the similarities between TFT and MOS ICs. Weimer continued his work developing more complex digital TFT ICs such as shift registers and pursued other semiconductor thin-film compounds. The performance of TFT transistors was far inferior to the silicon MOS transistor. That inferiority and the instability of TFTs25 precluded their broad acceptance for digital IC applications. With subsequent improvements, because of their suitability for deposition on glass substrates, TFTs became a crucial technology for liquid-crystal, flat-panel displays. Weimer’s development of the TFT and TFT ICs began earlier than the efforts by other RCA researchers to develop silicon MOS transistors and ICs. Weimer was in close contact with these researchers, just as he had been with Wallmark and his work on the UJT. In 1970 Weimer recalled in his oral history, ‘‘I remember Steven Hofstein saying to me that that’s [the characteristics of the first TFT] exactly what we are looking for in silicon. Well they eventually found it, and Hofstein published the paper and that was the (RCA’s) first MOS transistor in silicon.’’26 Cross communication and learning between Weimer and Hofstein occurred because they were both in Thomas Stanley’s Integrated Electronics Group at RCA Laboratories.
In approximately 1960, William Webster and Stanley, who reported to Webster at the RCA Laboratories, recognized that the silicon MOS transistor looked promising.1 Stanley saw a potential for MOS ICs in digital computing. He recruited two young engineers, Steven Hofstein and Fredrick Heiman, just out of their undergraduate studies, to join Karl Zaininger, who was already working on silicon surface states.1,25,27 Earlier attempts at fabricating reliable silicon MOS transistors were unsuccessful. Stanley was giving these two young men an opportunity to succeed without being distracted by previous failures.1 Not only were the pair successful in creating silicon MOS transistors and ICs, but their work encouraged many other RCA engineers and scientists at both Princeton and Somerville to work on MOS and CMOS technology for the balance of the 1960s. The first MOS IC, an array of 16 interconnected MOS transistors, was fabricated by Hofstein and Heiman as part of an Air Force contract in 1962 (see Figure 11).28 Hofstein’s notebook, witnessed by Zaininger and Wallmark, records the entry on 22 June 1962.4 In November 1964, RCA issued ‘‘Application Note AN-201,’’ which described amplifier circuits for the n-channel 3N98 and 3N99 transistors, the company’s first commercial MOS devices.29 RCA announced the development of the MOS IC in February 1963 with much fanfare via a lead article in the industry newspaper Electronic Engineering Times. The article stated, ‘‘The device is capable of being produced from single chips in large interconnected arrays.’’27,30 In addition, the work was presented at the Electron Device Meeting (EDM) in October 1962.28 At that meeting, Princeton University Professor George Warfield said, ‘‘Although the MOS devices are still at the research stage because of fabrication problems and incomplete physical understanding, their impact on microelectronics is certain to be significant.’’27 Hofstein and Heiman described their work in a report dated 16 July 1963 as a deliverable under Air Force contract AF19(604)-8836. The contents were published as ‘‘The Silicon Insulated-Gate Field-Effect Transistor’’ in the Proceedings of the IEEE in September 1963.28 The cover of that issue shows a photomicrograph of a portion of the 16-transistor array wafer with the caption ‘‘Integrated Transistor Circuits.’’ The first article noted on the list of contents is ‘‘IEEE’s First Year.’’ Coincidentally, but fittingly, the silicon MOS IC and the IEEE were born in the same year. Hofstein was a key link between the past and the future of microcircuitry at RCA. He interacted closely with both Wallmark and Weimer. In 1963, Wallmark was 44 years old, Weimer about 49, and Hofstein only 24. Hofstein called Wallmark his ‘‘advisor.’’30 On the road to the MOS transistor, Hofstein’s notebook pages described ‘‘a new device’’ that was a surface-effect device that had the characteristics of a PIN diode. That page (see Figure 12) was signed by both Wallmark and Zaininger. This early MOS activity at RCA provided important knowledge and insight that benefitted the semiconductor industry in general. Hofstein and Heiman contributed equations for modeling the characteristics of the MOS transistor and demonstrated that it provided an important component for the design of ICs. In another example, Thomas Stanley published an analysis in 1962 that showed that the MOS transistor was superior to its bipolar counterpart for linear scaling. Because of its critical speed limiting dimension, the length of the gate lay in the horizontal rather than the vertical plane of bipolar devices, so the speed of the device increased with the shrink of die size. Shrinking became an important technique to enhance the speed and reduce the cost of MOS ICs in the 1970s and beyond. In their 1963 paper, Hofstein and Heiman acknowledged Joe Scott and Jack Olmstead, both of the Advanced Development Laboratories, headed by Bob Janes, of the RCA Semiconductor Division in Somerville.25 This cooperation enhanced the transfer of MOS technology from a research environment to the commercial activities of the Semiconductor Division and to the development of personnel with technical and manufacturing expertise at that location. As I noted earlier, the short, 20-mile drive from Princeton to Somerville greatly facilitated that transfer. Hofstein and Heiman’s original work was funded by the Air Force. Subsequently government contracts funded many MOS projects, both at RCA Laboratories and the Semiconductor Division. In the 1960s, it is estimated that, more than 50 percent of the R&D work on MOS at RCA was funded by government contracts.
On Tue, Sep 24, 2019 at 7:14 PM somaspack via Groups.Io <firstname.lastname@example.org> wrote: