9825 restoration notes and questions


Jack Rubin
 

Over the summer, I was given a beat-up 9825B with a cracked case and broken keyboard keys. It sat on the shelf until recently when, after a conversation with Paul Berger about his ROM project, I realized it was actually an upgraded 9825T. The machine powered up but was stuck in an error mode that I couldn't clear. I also have a nice working 9825A so I decided to build a full-up T out of the best pieces of the two machines.

Most of the swapping was pretty routine. The few problems I ran into reflected physical damage to the T case. Four keys were broken off, the main chassis "tray" is cracked, one of the anchoring threaded inserts for securing the keyboard assembly was torn loose and the fan mount was broken so the fan only secured by it's power wires. Right now, I have the machine running successfully, still in the cracked case but with most of the A keyboard assembly on the front end. 

Generally, the machine seems to function completely normally. I've now spent several power-on hours with it, playing with various programs under HPL. 

Several questions:

- Sometimes (when I flex the case or remove/install the top cover with the machine powered on), the display will blank out or change to a sigma on power-up instead of a lazy-T display. If the sigma is displayed and I try to reset or clear the display by pressing CLEAR, the machine displays "drrnr 00" and stops responding. What does this mean? The behavior is reproducible and doesn't seem to be any sort of ROM rot. I can clear the error by removing and re-seating the keyboard assembly.

- One machine has a "bustle" for the power entry outlet - instead of being flat against the rear panel, the power receptacle is in a rectangular protrusion, about 1 x 3 inches and 1 inch deep. Are these differences significant? Which is the "best" supply for the finished T machine?

- "list 0" displays 31260. Is this the correct memory display for a T configuration machine?

- What is the best source for more thermal paper for the printer?

- Are there any hardware updates or modifications that should be made to increase reliability and/or longevity during the restoration process? 

- Can the HP85 DC2000/QIC40 mod be made to the 9825 tape transport?

Thanks in advance for your interest and help!

Best,

Jack


 

 

 

Several questions:

- Sometimes (when I flex the case or remove/install the top cover with the machine powered on), the display will blank out or change to a sigma on power-up instead of a lazy-T display. If the sigma is displayed and I try to reset or clear the display by pressing CLEAR, the machine displays "drrnr 00" and stops responding. What does this mean? The behavior is reproducible and doesn't seem to be any sort of ROM rot. I can clear the error by removing and re-seating the keyboard assembly.

Ans: I don’t know but is seams to me a power on reset issue. Internal resistor values of 74LS123 / 121 monoflops will change over time, and can cause this kinds of trouble.
It’s also a good thing to check your capacitors, especially the ones used for timing circuits.

- One machine has a "bustle" for the power entry outlet - instead of being flat against the rear panel, the power receptacle is in a rectangular protrusion, about 1 x 3 inches and 1 inch deep. Are these differences significant? Which is the "best" supply for the finished T machine?

Ans: This is the mains EMC filter, the best supply is the one with the lowest ripple and best voltage values.

 

- "list 0" displays 31260. Is this the correct memory display for a T configuration machine?

Ans: Yes

- What is the best source for more thermal paper for the printer?

Ans: local bookshop or epay

- Are there any hardware updates or modifications that should be made to increase reliability and/or longevity during the restoration process? 

Ans: Place a crowbar so the supply will be over voltage protected.

- Can the HP85 DC2000/QIC40 mod be made to the 9825 tape transport?

Ans: Yes, but the 9825 has problems with the end of tape markings from the DC2000 tapes, so it will  despool the tapes to far.

Thanks in advance for your interest and help!

Best,

Jack

-Rik


 


On Jan 23, 2017, at 10:06 PM, Jack Rubin <j@...> wrote:

- "list 0" displays 31260. Is this the correct memory display for a T configuration machine?

No, a T says 61662 with all of the standard T ROMs enabled.  Either the second RAM/ROM card is not working or you have a B version.


 


On Jan 23, 2017, at 10:06 PM, Jack Rubin <j@...> wrote:

- "list 0" displays 31260. Is this the correct memory display for a T configuration machine?

Just found what I was looking for, in the 9825B Desktop Computer Service Manual, on page 3-10 figure 3-8 shows a switch on the A24 memory board that will affect the amount of usable memory.  You should check that switch for the correct position, which will also cause the system programming ROM to be usable on a 9825T if the A25 memory board is also installed.


Jack Rubin
 

The machine is definitely a T - it has the appropriate A24 and A25 boards. The switch on A24 was pushed to the right position (relative to the front of the machine - labeled 24/64) but was nearly immovable. When I was able to move it to the left, "list" read 31260; pushed back to the right it "list" now reads 31252. A new switch is on order.

Trying to run with only the A24 board in place gives an error 43 but shouldn't that work if the switch is set to the 24/64 position?

Are there any hardware tests that can be run without mass storage beyond just pressing "list" for memory size?


 


On Jan 24, 2017, at 3:33 PM, Jack Rubin <j@...> wrote:

The machine is definitely a T - it has the appropriate A24 and A25 boards. The switch on A24 was pushed to the right position (relative to the front of the machine - labeled 24/64) but was nearly immovable. When I was able to move it to the left, "list" read 31260; pushed back to the right it "list" now reads 31252. A new switch is on order.

That sounds like the one or more of the ROMs that are enabled in the second position grabbed 4 words of memory for use.   The power on memory test in the 9825T starts at the highest RAM address and works downwards towards 02000 (2048 bytes), and it stops at the first location that fails to compare with the test patterns, then rounds up to the next higher 2K boundary. At a minimum, memory starting at (word) address 076000 must be good, or the reset code just hangs on a hard non-interruptible branch.

It seems to me that there is a problem with the A25 board, or possibly the cable or connectors on it that enable the RAM, or the state machine hardware that enables the RAM that shares the ROM address space.  Try reseating the cables attached to the A25 card, also examine them for broken conductors.  I believe the A25 board contains the system programming ROM for the 9825T, you could see if any of its keywords are recognized with the switch in the right hand position.  That may tell you if the A25 board is fully bad or inoperative.

Trying to run with only the A24 board in place gives an error 43 but shouldn't that work if the switch is set to the 24/64 position?

Error 43 means the tape drive has a fault or is missing.  I see this on my second 9825T that does not have a tape drive installed.  I have not yet examined the tape drive initialization code in detail to see what it does after a reset, so I don’t know what it requires to not report error 43.  It is interesting you don’t see the error with the switch on both positions.  Perhaps you have more problems due to the physical damage you described to the computer.

Are there any hardware tests that can be run without mass storage beyond just pressing "list" for memory size?

Unfortunately no, not without a working tape drive and a system test cartridge.  From HPL there is no way to poke/peek memory except by allocating variables and writing into them.


 


On Jan 24, 2017, at 4:11 PM, Craig Ruff <cruff@...> wrote:

I believe the A25 board contains the system programming ROM for the 9825T, you could see if any of its keywords are recognized with the switch in the right hand position.  That may tell you if the A25 board is fully bad or inoperative.

I was wrong, the System Programming ROM is physically on the A24 board, but requires the state machine hardware on the A25 board to be functioning to allow it to be used.


Jack Rubin
 

I replaced the plotter/memsize slide switch on the A24 board and things are a  little clearer although not necessarily better. It seems that the A25 board is invisible to the rest of the system. I show the same memory size whether or not the board is installed - if the A24 switch is set to select 64K memory and the '62 plotter, "list/execute" gives 31294 and with the '72 plotter selected, it gives 31260. If I enter "list 0/execute", the results are 31286 (plotter 62) and 31252 (plotter 72). The results are the same with or without the ribbon cables connected to A25. 

Setting A24 to 24K and selecting the '62 plotter, "list/execute" displays 22952 and "list 0/execute" displays 22944. 

I'm not sure how LIST works (does it show remaining memory?) or why adding a non-existent line consumes 8K of memory, but that's a question for another time.

Trying to RUN or STORE "asc", "for" or "mdec" all give "mnemonic unknown" errors, thus showing ROMs are not loaded.

All power supply voltages are in spec with minimal ripple and checking voltages on random 4116 RAM chips when the A25 board is installed shows correct values for +5, -5 and +12 at the chip. I've also cleaned and re-seated the various cable connectors. Everything looks good visually.

*********************************************

I'm not sure where to go from here. Trying to correlate Tony's schematics with the Processor Theory of Operation section of the service manual (09825-91030), I'm guessing that what the manual calls the Monitor Bus is what Tony labels Ext Ctrl. If the Monitor Bus connection is intact, I think I should find D2MapClk on pin 6 of U43 and DMapClk on pin 15 of the same chip. Does that make sense? Should the clocks should be 6MHz? 

Thanks!


Paul Berger
 

See below...


On 2017-01-30 10:16 PM, Jack Rubin wrote:
I replaced the plotter/memsize slide switch on the A24 board and things are a  little clearer although not necessarily better. It seems that the A25 board is invisible to the rest of the system. I show the same memory size whether or not the board is installed - if the A24 switch is set to select 64K memory and the '62 plotter, "list/execute" gives 31294 and with the '72 plotter selected, it gives 31260. If I enter "list 0/execute", the results are 31286 (plotter 62) and 31252 (plotter 72). The results are the same with or without the ribbon cables connected to A25. 

Setting A24 to 24K and selecting the '62 plotter, "list/execute" displays 22952 and "list 0/execute" displays 22944. 

I'm not sure how LIST works (does it show remaining memory?)
Yes it is explained in the operating a programming manual of all places, the first number is the size of the program and would be 0 if there is no program in memory and the second number is the memory size.
or why adding a non-existent line consumes 8K of memory, but that's a question for another time.

Trying to RUN or STORE "asc", "for" or "mdec" all give "mnemonic unknown" errors, thus showing ROMs are not loaded.
The 'asc' keyword seems to be in the base ROM,  you would not get to the point of being able to enter anything unless at least some of the ROMs are working but the base is spread over more that one ROM.  The 'for' keyword is in the advanced programming ROM and 'mdec' is in the Advanced I/O  neither of which will be available if memory switch is in 32K position.  See memory maps on page 4-6 of the service guide.

All of the ROMs in a B/T are on the A24 board there are signals from the A25 board that change the memory mapping, I recall going over the mapping logic but don't recall where it is off the top of my head, I will take a look when I have time, but right now it getting late here.  I guess it is possible you have a defective ROM on the board, but it is pretty hard to check with out the diagnostic programs, which I know of no source.  I set up a rig to simulate the IDA BUS pretty easily, it might be easy for you too depending on your electronics skill level.  I can explain how I did that.  Another alternative is you could send the boards to me and I could test them in my T.

All power supply voltages are in spec with minimal ripple and checking voltages on random 4116 RAM chips when the A25 board is installed shows correct values for +5, -5 and +12 at the chip. I've also cleaned and re-seated the various cable connectors. Everything looks good visually.

*********************************************

I'm not sure where to go from here. Trying to correlate Tony's schematics with the Processor Theory of Operation section of the service manual (09825-91030), I'm guessing that what the manual calls the Monitor Bus is what Tony labels Ext Ctrl. If the Monitor Bus connection is intact, I think I should find D2MapClk on pin 6 of U43 and DMapClk on pin 15 of the same chip. Does that make sense? Should the clocks should be 6MHz?
What troubleshooting tools do you have available?  We could provide better guidance knowing what tools you have at hand.

Paul.

Thanks!


 

On Jan 30, 2017, at 7:16 PM, Jack Rubin <j@ckrubin.us> wrote:

I'm not sure where to go from here. Trying to correlate Tony's schematics with the Processor Theory of Operation section of the service manual (09825-91030), I'm guessing that what the manual calls the Monitor Bus is what Tony labels Ext Ctrl. If the Monitor Bus connection is intact, I think I should find D2MapClk on pin 6 of U43 and DMapClk on pin 15 of the same chip. Does that make sense?
Your problems are not related to the plotter/memory size switch. Because your system appears to work with just the A24 board installed, it sounds like the basics are functioning correctly, except for the tape drive error 43. (I’m still slogging through the patent listing entering in comments for the code.)

According to the 9825B service manual, pages 4-6, 4-7:

The addition of the option memory assembly, A25, adds 29,510 bytes of memory to the 9825B to make it a 9825T. This assembly contains sixteen, 16k-bit RAMs and a state machine. This state machine is connected to the processor's Monitor Bus. The state machine determines whether a particular memory cycle will reference RAM or ROM. With this capability, the read/write memory can be expanded to· occupy the same address locations as the read only memory. The A25 read/write memory actually occupies the same address space as
the read only memory on the A24 assembly.

The A25 state machine knows the following information about each memory cycle:
• Whether the memory cycle is an instruction fetch, address fetch, data fetch or I/O cycle.
• Whether the memory cycle is a read or a write.
• The address of the memory reference.
• The address and class of the currently executing instruction.
• Whether the instruction accesses RAM or ROM.

The state machine asynchronously switches between RAM and ROM after the monitor bus becomes stable and before the memory cycle starts. The time required for the state machine to make a decision is less than 50 nanoseconds. The state machine contains a bit map with one bit used to specify whether the address references RAM or ROM. A ROM disable signal is then used to disable ROMs during a read/write cycle and to enable ROMs during a ROM cycle.
The monitor bus provides the state machine with the necessary signals to determine the type of memory access about to take place.

The monitor bus signals are:
SYNC Indicates instruction fetch cycle.
BG Indicates processor cycle.
EBG Indicates a monitor cycle.
SMC Indicates valid data on memory bus.

The state machine monitors the following signals from the IDA bus:
R/W Indicates a read or write is taking place.
Address Indicates the address of the current memory cycle .
Instruction Indicates the class of instruction.
Clocks For state machine clocking.

Thus, there is quite a lot going on to correctly enable the extra RAM and some of the ROMs. This should correspond to pages 34 and 35 of Tony’s schematic. I’m guessing that the ROM U29 on page 34 contains the bit map. Any errors in the determination as to whether an access should be directed towards ROM or RAM will cause problems of the sort you are seeing. Short of being able to swap your A25 board for another, we will have to strategize how you might be able to test. I have a second 9825T, perhaps we could arrange to get your board to me or my board to you for troubleshooting.


 


On Jan 30, 2017, at 7:16 PM, Jack Rubin <j@...> wrote:

If the Monitor Bus connection is intact, I think I should find D2MapClk on pin 6 of U43 and DMapClk on pin 15 of the same chip. Does that make sense? Should the clocks should be 6MHz? 

I suspect that what Tony has labeled as DMapClk and D2MapClk may actually be the internal state signals from the BPC that indicate what type of memory access is being performed, and will not be periodic 6 MHz clocks, but dependent on what instructions are being executed at any point in time.

My logic programmer won’t read a 2332 ROM (i.e. U29), but I could rig up my 16500C or an ATMega to get the contents for comparison.


Jack Rubin
 

Craig and Paul,

Thanks to both of you for info and suggestions, especially your offers to swap boards for testing. 

I've got an HP LogicDart that makes it pretty easy to look around for pulsed input, so I'll use that tomorrow to try to find any activity on A25 that indicates the Monitor Bus cable is intact. I haven't yet actually pulled the processor assembly out of the case, so I'm still hoping that there may be a loose/bad/dirty connection that will be easy to resolve but I realize that may be unrealistic. 

I'll be able to put in a couple of hours tomorrow morning but then will be away for a couple of days. I'll post an update in the morning.

I have a scope and an older HP logic analyzer so I can also dig deeper if necessary, but without timing diagrams or a comparison board, I'm not too sure how far I'll be able to go.




 

For the tape drive error 43, this is caused by bits 3 (power off), 1 (servo failed), or 0 (unexpected BOT/EOT) of the tape controller's status register (R5) being set. These will be placed into bits 15, 13 or 12 of the ‘errwd’ (RAM base page word) by the ‘stsaf’ routine of the tape driver firmware.

At power up, the this will be caused by the probe of the tape drive during the implicit ‘ldp 0’ executed by the Extended I/O ROM at initialization time. Thus, if you see the error 43, that implies that the Extended I/O ROM is present and functional.


Jack Rubin
 

Interesting - not much time to play around this morning before leaving for a few days, but I did find that with A25 in place and 64K selected, the system would note the presence/absence of the tape drive (i.e. error 43) if the Monitor Bus cable was _removed_. If the cable was in place, no error was reported whether the  tape drive was connected or not. Clearly _something_ is happening on A25 and the Monitor Bus cable is providing some signals. 

More tantalizing than conclusive. When I return home later in the week, I'll go ahead with a full physical tear-down and inspection of the other end of the Monitor Bus cable. 

More to come ...


Paul Berger
 

Craig mentioned that error comes from the extended I/O, if the memory switch is in the 32K position when you remove the A25 card the extended I/O would not be available, this would suggest that the A25 card is participating with remapping the the ROMs.  This may indicate that the A25 is at least partially functional and the problem might be the RAM array on the card.

Paul.



On 2017-01-31 1:59 PM, Jack Rubin wrote:

Interesting - not much time to play around this morning before leaving for a few days, but I did find that with A25 in place and 64K selected, the system would note the presence/absence of the tape drive (i.e. error 43) if the Monitor Bus cable was _removed_. If the cable was in place, no error was reported whether the  tape drive was connected or not. Clearly _something_ is happening on A25 and the Monitor Bus cable is providing some signals. 

More tantalizing than conclusive. When I return home later in the week, I'll go ahead with a full physical tear-down and inspection of the other end of the Monitor Bus cable. 

More to come ...



 


On Jan 31, 2017, at 10:59 AM, Jack Rubin <j@...> wrote:

Clearly _something_ is happening on A25 and the Monitor Bus cable is providing some signals. 

At least the A25 board is on the top of the stack and easy to reach for attaching logic probes.


 

> if the A24 switch is set to select 64K memory and the '62 plotter, "list/execute" gives 31294 and with the '72 plotter selected, it gives 31260.

Side question: is it so that you can then change a T that's configured for a '62 plotter to one that uses the '72 plotter by just flipping a switch? No need for an internal ROM change?

Marc


 


On Feb 2, 2017, at 4:15 PM, CuriousMarc <marc.verdiell@...> wrote:

Side question: is it so that you can then change a T that's configured for a '62 plotter to one that uses the '72 plotter by just flipping a switch? No need for an internal ROM change?

Exactly.


Paul Berger
 

I just too a look at the schematic sheets for for the A24 and A25 cards with my scribbled notes.  The two cards are largely independent of each other, with only two signal from the A25 board that affect the A24 board.  Since you now say that the machine operates correctly without the A25 card, that would suggest that would verify function of 99% of the A24 board.  The two signals produced by the A25 board are OptMap and ROMSel.  The OptMap signal is pulled to ground by the A25 board this is inverted and is one input to a NAND gate (U49d) and the output is the C2 input top U48. When the A25 card is not installed the line is pulled high which in effect disables the system programming ROM and also turns off -CartOE for addresses 0x5400, 0x5800, and 0x5C00.  When the A25 card is present and ROMSel is active (high) the system programming ROM is active  at address 0x5000 and -CartOE will be active for addresses 0x5400, 0x5800 and 0x5C00.  Ox5C00 is where the second window to the 98228A ROM exists, the other two addresses appear to be unused.

ROMSel is an output from the state machine that inhibits the RAM and enables ROM.  The RAM on the A24 board is in the upper half of the memory maps, and the RAM on the A25 board is mapped into the lower half of the map, but has the first 2K disabled for space occupied by CPU registers, BasePage ROM and Compiler ROM. The 98228A also uses the area occupied by the BasePage ROM and Compiler ROM Tables for its bank selection mechanism since it is always occupied by ROM, and write to that space have no effect on the ROM.  The two cards independently determine when their RAM should be enabled.

Since the U29 ROM is connected to the demultiplexed  address bus, the contents could be dumped without removing the card you would just need to simulate enough of the bus to generate the addresses and the ALE signal to latch the address and the output of U29 could be captured using something like a logic analyzer.  

Always keep in mind that the MAD bus is NEGATIVE logic if you don't and you are trying to figure out the logic of anything connected to it you will quickly go down the garden path.


Paul.


On 2017-01-31 1:59 PM, Jack Rubin wrote:

Interesting - not much time to play around this morning before leaving for a few days, but I did find that with A25 in place and 64K selected, the system would note the presence/absence of the tape drive (i.e. error 43) if the Monitor Bus cable was _removed_. If the cable was in place, no error was reported whether the  tape drive was connected or not. Clearly _something_ is happening on A25 and the Monitor Bus cable is providing some signals. 

More tantalizing than conclusive. When I return home later in the week, I'll go ahead with a full physical tear-down and inspection of the other end of the Monitor Bus cable. 

More to come ...

_._,_._,_




Paul Berger
 

Now that I think of it, it would be possible to verify the operation of the whole state machine on the A25 card using sometime to provide the appropriate input signals to the card since it is all static logic.

Paul.