On Feb 20, 2017, at 10:50 AM, Paul Berger <phb.hfx@...> wrote:

You could talk directly to it by replacing the processor card or writing custom code for the processor in it  (BPC only version of the processor in 9825), but it would probably take some probing to discover how to talk to the TACO.

I wonder if the TACO chip is an enhanced version of the tape controller in the 9825.  The comments in the 9825 tape firmware listing led me to think some portion of the code might be shared with the 9875, in particular the portion known as the “Tape Driver” that resides in the ROM at 020000.  The 9825 FW keeps track of tachometer pulses to know how far  it has moved the tape, and does the data stream bit serialization/deserialization operations in FW.  It also manages the two levels of the read threshold to check if data will be likely to be read back correctly.

For archival imaging, no need, at least initially, to do anything with the bit stream other than to capture it. At that point, either one could attempt to read the image itself or else write it back to another tape, hopefully allowing the creation of a new generation of system tapes.

What would be the "best" FACT drive to use from the standpoint of reliability and ease of control?

Does any other machine that uses these cartridges have a richer command set that allows full tape duplication? Does the 9875 dual drive allow this?

Jack

Martin,

 

I’ve uploaded some Integral disks from another source.

You can recreate the images with rawwrite the win version is in the same directory.

I’ve checked the Cpp and basic disks and they seem to be oke.

 

-Rik

 

Van: VintHPcom@groups.io [mailto:VintHPcom@groups.io] Namens Martin Hepperle
Verzonden: woensdag 15 februari 2017 17:43
Aan: VintHPcom@groups.io
Onderwerp: Re: [VintHPcom] HP Integral PC

 

Rik,

thanks for the offer - right now I acquired a 1MB board and will test this first before proceeding to populate the 512KB board.

However I came across another problem with some of the TD0 disk images on the HP-Museum web site. Some of the orginal TD0 files downloaded from there did not produce a working disk image.

If I insert these disks into my Integral it shows an empty directoy - no files visible. I tried different disks and rewrote the same disks a few times - without success.

Using the TD02HPI tool chain from Ansgar Kückes I have produced LIF image files from these TD0 files. I then used them with HPDRIVE. However these files also have some errors. Some files were readable, some not. Therefore I assume that the original TD0 image files are partially corrupt.

So: has anyone here created disks from the three TD0 files listed below? All other files which I had created so far (about 15( work fine.

Possibly corrupted disks:

• IPC BASIC
• IPC BASIC Bonus disk
• C Preprocessor

 

IPC BASIC Bonus disk

- completely unreadable

IPC BASIC disk
defective files:
   README
   hpgl.data
   load_rt

C Preprocessor disk
defective files:
   cc
   copyhard
   cpp
   rm
   size
   strip

C Documentation on Preprocesor disk
man3/
   putc
   regex
   setbuf
   setjmp
man2/
   shmap
   signal
   stat

 

I currently use a NEC 1770NX (the "NX" is important!) and am quite satisfied. Not every monitor with sync-on-green works well, this one does (and looks damn good). I guess for proper operation the horizontal sync capabilities are essential. Jon from hpmuseum once said (and it is still on his web site) that the  NEC LCD1800, LCD1810, LCD2010 and LCD1830 are good replacements for the higher resolution HP monitors, but I personally like the more compact 17" and especially the more decent 1770NX. The NEC starts hsync at ~30 kHz (original VGA timing). The low res monochrome video boards, however, provide a 15 kHz hsync, which is supported only by some LCDs with composite video input. My DELL for example has that kind of input, but still does not detect the output from the low res HP 300 monochrome boards, So I am glad I still have my 82913A at hand.

I also tried with an LM1881 sync splitter, but it cannot replace a true sync-on-green input circuit (the LM1881 does not correct the wrong black level, or shall I say dark-green-level...).

Just to make sure I don’t go off on a tangent, the bank register is latching the low order 3 bits of the address used to address the register at the falling edge of ALE, and not the data value written later on in the data transfer phase of the write cycle?

On Feb 11, 2017, at 4:00 PM, Paul Berger <phb.hfx@...> wrote:

You understand that there are two 1K word windows into the  ROM and the bank selection is done by write to the area occupied by the base page ROM, I think my writeup included with the package gives a good description of how it works.

Yes.  At the moment, I’m looking at the code in bank 0 that appears to be associated with bank selection of the other banks.  There are two instructions that my disassembler flagged as invalid bit patterns.  They are at (octal) word addresses 30272 (pattern 070113) and 30313 (pattern 070117).  These do not match any instructions described in the 9825A patent, nor in the 9835 Assembly Language manual (the 9835 CPU is a superset of the 9825 CPU).  The instruction at 30272 happens immediately after a dir (disable interrupts) instruction, and the one at 30313 immediately before an eir (enable interrupts) instruction.  The rest of the code in this sequence copies blocks of 16 words from one location to another, I have not yet determined what this data is.

These apparently invalid instruction bit patterns do not occur as instructions in the entire contents of the other 9825T ROMs.  I have not yet looked at the contents of banks 2-7, nor do I have tentative labels or definitions for base page temporary locations being used.

Notes about the disassembler output.  

The second column are word attribute tags derived from the disassembly process.  The ‘r’ indicates ROM, ‘i’ the word is considered to be an instruction, ‘c’ means a conditional jump, ‘u’ means unconditional jump.

Symbols in the operand column surrounded by braces on a line following an instruction are alternative names known for the operand location.  They may or not apply semantically to that specific instruction.  For example, at 30273, the operand address is the decimal 152 constant in the base page rom.  It is also known, via an equate as b230 (octal 0230).

30256 ri   004177  selbank?  ldb  p0          ; perform pre bank select stuff?

                                  {kpa,dpa,ppa,zero} 

30257 ri   035742            stb  op1       

                                  {tvar3,op1e} 

30260 ri   004177            ldb  p0        

                                  {kpa,dpa,ppa,zero} 

30261 ri   035767            stb  77767     

30262 ri   004077            ldb  p58       

                                  {b72,colln} 

30263 ri   025044            adb  stolendsk 

30264 ri   035763            stb  77763       ; save address stolen+58

30265 ric  011335            cpa  77335     

30266 riu  067315            jmp  selbnkjmp   ; bank already selected?

30267 ri   031335            sta  77335     

30270 ri   022676            ada  31676       ; «(31676) = 055750»

30271 ri   070430            dir            

30272 ri   070113            INVALID              ; «Unknown instruction, load something into A?, something else entirely?»

30273 ri   030047            sta  p152        ; «write to 0230, select bank 0? Is this an argument word?»

                                  {b230} 

30274 ri   104000            ldb  a,i       

30275 ri   174510            sbr  9         

30276 ri   035762            stb  77762     

30277 ri   104000            ldb  a,i       

30300 ri   174606            sbl  7         

30301 ri   174506            sbr  7         

30302 ric  044000            isz  a         

30303 ri   100000            lda  a,i       

30304 ri   134001            stb  b,i       

30305 ri   005763            ldb  77763     

30306 ri   071417            xfr  16        

30307 ri   020127            ada  p16       

                                  {adr2,b20,ar2a,d16} 

30310 ri   024127            adb  p16       

                                  {adr2,b20,ar2a,d16} 

30311 ric  055762            dsz  77762     

30312 riu  067306            jmp  *-4       

30313 ri   070117            INVALID              ; «Unknown instruction, store A into something?»

30314 ri   070420            eir

30315 ri   030041  selbnkjmp  sta  00041       ; select bank (1)? and jump to code at 077763?

30316 riu  165763            jmp  77763,i