Re: Stretching the topic slightly for ADF4351 boards

Andy G4JNT

The same problem reared its head when the RDDS locking system was developed.   A 10MHz PIC clock interfered with the 10MHz reference and it's sensitive locking circuitry.   The solution was to change the PIC clock to 11.2896MHz

On Tue, 7 Sept 2021 at 09:22, G8ACE <hazellje@...> wrote:
Thanks to all for the additional info on the ADF board with PIC and LCD that I had not seen previously.

A couple of points.  Its quite likely that the stability of the on pcb 25 MHz ref can be improved by insulating the crystal with some polystyrene.
In effect using the pcb as an oven for the crystal.  The actual frequency accuracy may not be improved but improved stability is worthwhile.

I see in the circuit provided by Roberto, thanks, that a 10 MHz clock crystal is shown for the PIC.  If  another 10 MHz crystal is also used for the ADF ref input its pretty certain that these two crystals will talk to each other even when physically a few centimetres apart.  The difference frequency may well produce unwanted spurs.  This was a trap the 122 GHz project fell into when a 10 MHz external ref was added for extra 122 GHz stability.  Using the ADF ref also as an external PIC clock should cure any problem.

73s John G8ACE

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