Re: LMX2541

Andy G4JNT

On Sat, 11 Jul 2020 at 15:35, alwyn.seeds1 <a.seeds@...> wrote:
The PLL to lock the frequency to 10MHz reference has to be fairly narrow bandwidth so as not to spoil the phase noise performance.
The block diagram of a good signal generator shows the approach, though some synthesis schemes are of head-aching complexity to obtain continuous low-spur coverage.

NO, definitely NO

Inside the loop bandwidth, phase noise is directly related to that of the reference
Outside, far-out,  it is a function of the VCO, phase detector etc

So unless you've got a really crappy reference you wan't your loop bandwidth to be as wide as possible so you can make the most of that top-spec 10MHz or 100MHz or whatever reference.
You are probably thinking of the need to use a narrow PLL bandwidth to clean-up a noisy clock perhaps ?   A Totally different requirement


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