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Historical Analog Scope Triggering Techniques
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Was it common practice, in the days before DSOs, to use purpose built external circuits (counters, random combinatorial or sequential logic) to trigger your scope to specific conditions?
Seeing the P6406 word recognizer probe, which looks like just such an external bit of combinatorial logic professionally packaged, got me thinking about this. I had assumed, on first reading about the P6406, that it was specialized probe that would only work with specific scopes (and I'm still not sure if that's the case; it seems to be mentioned in connection to a range of 2400-series scopes), but it looks like it just produces a rising/falling edge signal and you are supposed to stick a regular passive probe in the output end to trigger off that signal. It seems like triggering off other bits of external logic (e.g. the rising/falling edge of a specific bit from a counter) would be very useful in diagnosing digital/binary circuits with an analog scope, especially if that scope were an analog storage scope. Was this sort of thing common practice? What was the range of techniques used? (yes, I'm looking for greybeard stories, but also trying to expand my meagre diagnostic skills) -- Jeff Dutky
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Jean-Paul
Hello Jeff: The 246x/B have a WR option, it adds a PCB and Lemo connector on the back panel, 6 pin.
P6407 Probe (pod) has 16 inputs on 0.25" pins in separate connectors, and comes with a set of test leads. http://w140.com/tekwiki/wiki/P6407 Spec is 10 - 20 MHz -0.5 to 5.5 V peak, TTL. Have this WR OPT 03 on one scope but its taken apart for PSU service, so cannot test out. TEK 7000 have a logic analyzer plugin and WR digital, as well as trigger delay plugins but I have no experience. Best, Jon
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Chris Wilkson
Not really a greybeard yet, but I have done that. :)
Many years ago I built a NTSC video decoder to trigger a Tek 2445 anywhere during a video frame. It was fully adjustable so I could do non-standard Atari 2600 "almost NTSC" timing stuff and trigger on any single pixel of a given field or frame. It also had a Z-output that could be used to intensify a part of the signal trace or even the video when I was displaying that on the 2445. I used 74HC TTL and some eproms to do it. And either a software based "trigger out" pulse on the joystick port or an analog integrator to separate the VSYNC edges from the video line. LM1871 was easier but I already had the integrators available on my composite-to-XYZ video converter. Another aspect was that I could trigger on a certain CPU address bus value. I've done a few other scope helpers over the years, but that one was the really useful one that I remember.
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Dale Chayes
On Dec 3, 2020, at 10:42 , Jeff Dutky <jeff.dutky@gmail.com> wrote:Occasionally w/ purpose-built triggering. More often w/ simple or complex logic recognizers to trigger a storage scope (analog or digital) to see what transpired immediately before some event. E.g what was going on when or just before, this interrupt service routine was invoked, or this embedded processor when “out of bounds”. E.g. WR501 with P6451 probes in a TM-500 chassis to trigger an HP 1741A….. -Dale (95% gray)…..
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The 74LS688 can be used to make a word recognizer.
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Dave Seiter
The 7A42 goes down this road, as it triggers on 4 bit logic. Always wanted one, but have never needed one.
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-Dave
On Thursday, December 3, 2020, 07:42:51 AM PST, Jeff Dutky <jeff.dutky@gmail.com> wrote:
Was it common practice, in the days before DSOs, to use purpose built external circuits (counters, random combinatorial or sequential logic) to trigger your scope to specific conditions? Seeing the P6406 word recognizer probe, which looks like just such an external bit of combinatorial logic professionally packaged, got me thinking about this. I had assumed, on first reading about the P6406, that it was specialized probe that would only work with specific scopes (and I'm still not sure if that's the case; it seems to be mentioned in connection to a range of 2400-series scopes), but it looks like it just produces a rising/falling edge signal and you are supposed to stick a regular passive probe in the output end to trigger off that signal. It seems like triggering off other bits of external logic (e.g. the rising/falling edge of a specific bit from a counter) would be very useful in diagnosing digital/binary circuits with an analog scope, especially if that scope were an analog storage scope. Was this sort of thing common practice? What was the range of techniques used? (yes, I'm looking for greybeard stories, but also trying to expand my meagre diagnostic skills) -- Jeff Dutky
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Tom Gardner
On 03/12/20 15:42, Jeff Dutky wrote:
Was it common practice, in the days before DSOs, to use purpose built external circuits (counters, random combinatorial or sequential logic) to trigger your scope to specific conditions?Yes, repeat no - depending on what you include in "external". I've added outputs to equipment I've built that were used to trigger whatever test equipment was attached. External equipment was often used to trigger sequences in a unit under test, and that can also trigger test equipment. But the overriding principle I've used is "analogue test equipment for analogue waveforms, digital test equipment for digital signals". That implies: * use scope to check the analogue waveforms will be correctly interpreted by receivers (e.g. standard logic) as digital signals. That's just ensuring the "signal integrity" * once you have signal integrity, flip to using logic analysers and printf() statements to capture and debug digital signals
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Steve Hendrix
At 2020-12-03 01:18 PM, Dave Seiter via groups.io wrote:
Was it common practice, in the days before DSOs, to use purpose built external circuits (counters, random combinatorial or sequential logic) to trigger your scope to specific conditions?I would often build a scope trigger into firmware, using a spare output pin as that trigger, and sometimes include an ability to command the trigger to indicate different events. One particular system done when I worked for a NASA subcontractor, included a very complex multiplexing system for sensors, with programmable filter selections, etc. I set it up so the console could ask to watch a particular sensor channel, and the firmware would fire the trigger just before beginning the setup for that channel, allowing the scope to display exactly what was going on during the switching and settling to the new channel. It ended up being pretty cool that I could be sitting in another room or even another building (this was before the Internet was widely used), and could switch the technician's scope between channels remotely. This was back in the 1980's long before we had all the fancy debugging features built into todays microcontrollers. Steve Hendrix
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This seems like a "purpose" for my old HP logic analyzers - use an LA to trigger on a complex logic situation, and the Trigger Output triggers the scope to show the analog situation.
[I've wanted an excuse to use a LA for something practical, but still don't really have a need in the projects I do.] Pete
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Clark Foley
There were other tricks using 7k plugins such as the 7D11 or the TM500 equivalent digital delay unit. I wasn't a word recognizer but you could delay by counting microprocessor/logic events such as clocks, interrupts, and such, and then trigger the scope. You might be able to stumble into a useful display by fiddling with the holdoff but it was not predictable or deterministic. You could also do odd things to trap narrow pulses, runt pulses and setup and hold violations as well using the gating controls of the 7D15 Universal Counter timer. The greatest addition to digital trouble shooting before multi-gigahertz DSOs, was the Micro-Channel Plate(MCP) analog CRT found in 7104, 2467 and 11302. The MCP tube could show you one bad event in a million without a camera!. (High writing rate film is too scary to introduce here!)
In the late 1980s, I used and shamelessly promoted the idea of using the 11302A with its holdoff by events, dual counters and MCP to not only see the nasty event but also quantify it up to 750MHz counting rate. You determine the error rate as small as 1 in 1E9. Maybe it was 1E10? You could do similar thing with 7D11, 7D15 in the 7104 with higher MCP performance but lower counter performance. I shaved today; so, no grey beard!
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Okay, this is all in line with what I've been thinking about: building a little box that can raise a TTL output on various conditions like a specific counter bit, or having a 16 bit input value between two selected values, or when certain bits are set or cleared, etc. It seems like this would make all kinds of things visible on a simple analog scope at relatively little cost (assuming that you don't want to do the triggering at clock rates much above a few tens of MHz, of course).
One of the things that I was trying to do with these scopes, before I got side tracked having to fix them, was to reverse engineer the digital interface to a gas plasma display in an old laptop. Getting anything more than a very general look at the display signals was very challenging, especially since I didn't understand most of the scope's features very well, but also because I just wasn't thinking clearly about how to trigger the scope and one what. After working on these scopes for the past month I think I'm beginning to get a better feel for what they can do and how they should be used. -- Jeff Dutky
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Tom Gardner
Consider buying one of the £20 logic analysers that use a USB
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interface and the PC's screen. That (8 bits, 24MS/s) should be more than enough to debug that kind of logic. Key advantages of an LA are complex triggering and filtering, so you only see the interesting information, not all the clutter.
On 04/12/2020, Jeff Dutky <jeff.dutky@gmail.com> wrote:
Okay, this is all in line with what I've been thinking about: building a
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Tom,
I have been considering just such an acquisition, but, until I can move my workshop to a larger space (that's on the list of things to do) there is no room for a computer, which has proven quite limiting on more than one occasion. Right now, however, I'm working within the confines of what I have to hand, and what would have been contemporary to the machine I'm trying to investigate (this is a hobby, and that's part of the fun). My actual goal is to get a shiny, new DSO with an LA option (I'm planning to get a Siglent 1204), but that won't be till some time next year. -- Jeff Dutky
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toby@...
On 2020-12-04 2:31 a.m., Jeff Dutky wrote:
Okay, this is all in line with what I've been thinking about: building a little box that can raise a TTL output on various conditions like a specific counter bit, or having a 16 bit input value between two selected values, or when certain bits are set or cleared, etc. It seems like this would make all kinds of things visible on a simple analog scope at relatively little cost (assuming that you don't want to do the triggering at clock rates much above a few tens of MHz, of course).I would consider a tiny FPGA rather than discrete TTL, which would give you thousands of gates of logic reconfigurable without soldering. You can get a suitable dev board for ~ $20. One of the things that I was trying to do with these scopes, before I got side tracked having to fix them, was to reverse engineer the digital interface to a gas plasma display in an old laptop. Getting anything more than a very general look at the display signals was very challenging, especially since I didn't understand most of the scope's features very well, but also because I just wasn't thinking clearly about how to trigger the scope and one what. After working on these scopes for the past month I think I'm beginning to get a better feel for what they can do and how they should be used.
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Harvey White
That or a CPLD, which has less capability and less cost. They're easier to use if you're making your own boards, but you'll need a programmer, so additional cost. Remember that while a CPLD has non volatile memory for the configuration, most FPGAs don't. That should be included on the development board, and if you're lucky, so will the programmer. Typical FPGA downloads a pass through program into the FPGA, uses it to program the memory, then programs the FPGA from the external memory. That reprogramming is automatic (or can be) when power is applied to the board.
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You'll want to program in either VHDL or Verilog, although I personally prefer VHDL. A critical part of the design is that regardless of CPLD or FPGA, the I/O voltages are ONLY 3.3 volts, and you *must* level translate. There are chips good for that, though, and you only need one way. An arduino, touchscreen display, programming, and some sort of interface to the CPLD/FPGA would set up triggering conditions. Do note that the FPGA can support a more complex (I2C or SPI) interface, and THAT needs to be level translated too. Nice project. The simpler design would be some dipswitches, 74LS86, 74LS30. One switch for 1/0, one switch for "don't care". But where'd be the fun in that? Harvey
On 12/4/2020 9:30 AM, toby@telegraphics.com.au wrote:
On 2020-12-04 2:31 a.m., Jeff Dutky wrote:Okay, this is all in line with what I've been thinking about: building a little box that can raise a TTL output on various conditions like a specific counter bit, or having a 16 bit input value between two selected values, or when certain bits are set or cleared, etc. It seems like this would make all kinds of things visible on a simple analog scope at relatively little cost (assuming that you don't want to do the triggering at clock rates much above a few tens of MHz, of course).I would consider a tiny FPGA rather than discrete TTL, which would give
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Tom Gardner
On 04/12/20 14:30, toby@telegraphics.com.au wrote:
On 2020-12-04 2:31 a.m., Jeff Dutky wrote:That can work, but there is a steep learning curve w.r.t. both the HDL and the toochain.Okay, this is all in line with what I've been thinking about: building a little box that can raise a TTL output on various conditions like a specific counter bit, or having a 16 bit input value between two selected values, or when certain bits are set or cleared, etc. It seems like this would make all kinds of things visible on a simple analog scope at relatively little cost (assuming that you don't want to do the triggering at clock rates much above a few tens of MHz, of course).I would consider a tiny FPGA rather than discrete TTL, which would give A logic analyser is simpler, cheaper, less to implement. Use both hammers and screwdrivers :)
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Tony Fleming
Harvey I know this isn't the place to thank you for helping everyone, but I
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wish you Happy Holidays and lots of health & love! And thanks for helping me with my Tektronix scope!!! I also like to wish you all Happy Holidays and best 2021! Let's all love each other! Let's find common ideas and be willing to listen to others! Tony
On Fri, Dec 4, 2020 at 9:46 AM Harvey White <madyn@dragonworks.info> wrote:
That or a CPLD, which has less capability and less cost. They're easier
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Harvey White
Thank you.
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Many years ago, I was working on TTL stuff with a 513D scope. I needed to look at multiple traces on a somewhat limited scope. I took the trigger output (I think), reduced it to a TTL pulse per sweep, ran that to a binary counter, then to an 8 to 1 multiplexer. The output of that multiplexer drove a common base summer that used the 4,2 and 1 outputs from the counter as 8,4 and 2 inputs to a homemade (crude!) D/A converter with the multiplex output going to the 1 input on that A/D. Essentially, I got 8 traces time multiplexed onto 1 trace. Worked for TTL only, but that's what I needed. Harvey
On 12/4/2020 10:58 AM, Tony Fleming wrote:
Harvey I know this isn't the place to thank you for helping everyone, but I
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Mark Litwack
There was an FPGA logic analyzer called the "Open Bench Logic Sniffer" that would make a good multi-purpose trigger accessory for a scope by using its trigger out signal. Along with the usual bit matching, it had an advanced mode which had features found in the old HP 16500 series logic analyzer like 10 trigger terms, 2 range terms, 2 timers, and a 16-level state machine. It operated on up to 32 bits of input.
Unfortunately, it's not available anymore, but the schematics, FPGA Verilog code, and host code to control the advanced trigger are all available if someone wanted to use it as a starting point: http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer The entry under "v3 Demon core in Verilog" has the details on the advanced triggering capabilities. -mark
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Caveat: I'm a circuit designer by background. I've been pushing CMOS W&L values around my whole career, so I'm no Verilog/System expert.
However, I am a design engineer at Xilinx and have dabbled a little in our software, Vivado. My understanding is that there is a lot of soft IP that comes included with the SW, including logic analyzers. And when it comes to logic analyzers, I only know that they exist and can guess their purpose and functions to some order. I'll have to take a look at this link above, and this thread gets my head going on possible "projects". For example, they love for us to get to know our products at a user level, and do things like giving us a mini Arduino-like system. Like a Raspberry-PI. I wonder if I can install the above on it. Or look at existing LAs included and see what they can and can't do. But then there's the 23 other "projects" I have going on. As noted by Tom above: "there is a steep learning curve w.r.t. both the HDL and the toolchain." The system level and toolchain are typically what keep me from getting into this, not the underlying code. Could be fun to bridge the worlds of my past and present. Dave
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