Curve tracer setup question...wrt PNP transistors


 

This is a good question for TekScopes so I’m forwarding it on to the forum to see what they think



Hi Sean,

There shouldn’t be more than a few microamps of current for the zero step of a 2N3906. 100 milliamps is a huge offset. I suspect there is a problem with the 577 or there is an internal calibration step you should find in the calibration procedure that explains how to zero that out.

As an experiment, if you enable the variable offset what do you have to do to get the 0 step down to 0 on the curve tracer?

Dennis Tillman W7pF



From: Sean Turner
Subject: Curve tracer setup question...wrt PNP transistors



Hey Dennis,



I was wondering if you can help me understand something about my 575 and PNP transistors. I found the following document (http://web.mit.edu/6.101/www/reference/tek575.html) which essentially lines up with what the 575 manual tells you to do for setting up the display, though they are talking about NPN in both cases. I have found this technique to work well for NPN transistors; the results agree generally with my 577D1 with the offset in “zero” mode (button IN). However, this is not the case with some 2N3906s I’m trying. On the 577, it shows a small amount of leakage current on the zero step (no offset selected at all; the zero button pushed IN). Generally ~100 mA. However, on the 575, if I follow the setup procedure, it shows none since I zeroed it out with the step zero control in the process.



So, how do I get the 575 set up to agree with the 577 here? Which one is right? Maybe they’re both wrong? Maybe I’m an idiot (entirely possible)?



Any tips and tricks much appreciated!



Thanks!



Sean


Sean Turner
 

Dennis,



On the 577, if I engage the offset, I only have to barely the rotodial thing to zero it. About 0.06 or so on the rotodial scale.



Yes, I do believe something is amiss, as I would not expect a silicon transistor to have anything like that kind of leakage!



Sean



From: Dennis Tillman W7pF <dennis@ridesoft.com>
Organization: Ridesoft, LLC
Reply-To: <dennis@ridesoft.com>
Date: Monday, February 1, 2021 at 13:14
To: <TekScopes@groups.io>
Subject: Curve tracer setup question...wrt PNP transistors



This is a good question for TekScopes so I’m forwarding it on to the forum to see what they think



Hi Sean,

There shouldn’t be more than a few microamps of current for the zero step of a 2N3906. 100 milliamps is a huge offset. I suspect there is a problem with the 577 or there is an internal calibration step you should find in the calibration procedure that explains how to zero that out.

As an experiment, if you enable the variable offset what do you have to do to get the 0 step down to 0 on the curve tracer?

Dennis Tillman W7pF



From: Sean Turner
Subject: Curve tracer setup question...wrt PNP transistors



Hey Dennis,



I was wondering if you can help me understand something about my 575 and PNP transistors. I found the following document (http://web.mit.edu/6.101/www/reference/tek575.html) which essentially lines up with what the 575 manual tells you to do for setting up the display, though they are talking about NPN in both cases. I have found this technique to work well for NPN transistors; the results agree generally with my 577D1 with the offset in “zero” mode (button IN). However, this is not the case with some 2N3906s I’m trying. On the 577, it shows a small amount of leakage current on the zero step (no offset selected at all; the zero button pushed IN). Generally ~100 mA. However, on the 575, if I follow the setup procedure, it shows none since I zeroed it out with the step zero control in the process.



So, how do I get the 575 set up to agree with the 577 here? Which one is right? Maybe they’re both wrong? Maybe I’m an idiot (entirely possible)?



Any tips and tricks much appreciated!



Thanks!



Sean


Sean Turner
 

As a follow up, I have a bag of no-name 3906s, so I tried a number of them. And now I'm leaning towards "cheap one hung low" transistors as the culprit. I pulled out another one, for instance, that shows no leakage on the 577 unless you get the vertical gain into the uA/div range.

My question still stands about how to ensure 100% that the 575 is set up correctly, since the zero operation is manual.

Sean

On Mon, Feb 1, 2021 at 12:14 PM, Dennis Tillman W7pF wrote:


This is a good question for TekScopes so I’m forwarding it on to the forum
to see what they think

Hi Sean,

There shouldn’t be more than a few microamps of current for the zero step of
a 2N3906. 100 milliamps is a huge offset. I suspect there is a problem with
the 577 or there is an internal calibration step you should find in the
calibration procedure that explains how to zero that out.

As an experiment, if you enable the variable offset what do you have to do to
get the 0 step down to 0 on the curve tracer?

Dennis Tillman W7pF

From: Sean Turner
Subject: Curve tracer setup question...wrt PNP transistors

Hey Dennis,

I was wondering if you can help me understand something about my 575 and PNP
transistors. I found the following document (
http://web.mit.edu/6.101/www/reference/tek575.html ) which essentially lines
up with what the 575 manual tells you to do for setting up the display, though
they are talking about NPN in both cases. I have found this technique to work
well for NPN transistors; the results agree generally with my 577D1 with the
offset in “zero” mode (button IN). However, this is not the case with some
2N3906s I’m trying. On the 577, it shows a small amount of leakage current
on the zero step (no offset selected at all; the zero button pushed IN).
Generally ~100 mA. However, on the 575, if I follow the setup procedure, it
shows none since I zeroed it out with the step zero control in the process.

So, how do I get the 575 set up to agree with the 577 here? Which one is
right? Maybe they’re both wrong? Maybe I’m an idiot (entirely possible)?

Any tips and tricks much appreciated!

Thanks!

Sean