Topics

468 Signature Analysis results and More Questions.


Michael W. Lynch
 

All:

I am working on a 468 Scope. All voltages are within parameters both the main and digital power supply sections. I have tested the analog section, bypassing the Digital section. Analog seems to work fine. Unit passes the Startup ROM test without error. Display is bright, clear and controllable when the digital section is bypassed. With the digital section enabled, there is no display in the "Non-Store" mode. Pushing the beam finder in this condition yields two dots fixed near the right side of the CRT. In the NORM Mode, there is a trace, but there are also various other issues with the digital storage, depending on which combination of switches is in play; too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost perfect agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature checks listed on Page 5-45. This is where I run out of knowledge, How do I interpret the results? All is well, signatures match until I get to U550, there I have all "BAD" signatures (308 flashes "FAILED") at all tested pins except the 5V signature (Test #1), then the balance of signatures are good until the end of TEST #1. Moving to U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"? Or is this a matter of "Garbage in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!
--
Michael Lynch
Dardanelle, AR


Dave Casey
 

Is the 308 programmed with an expected signature and telling you there's a
mismatch when it flashes "FAILED"? Or is that a different kind of error
condition (such as the 308 not getting a good enough signal or noisy
signal)?
I've only done SA with an HP5006A, which gives a readout of the signature;
it's then up to me to verify whether or not that output matches the table
in the DUT's manual. My recollection from reading the manual is that the
308 just lists the signatures on the screen as you capture them, but I've
never actually used one.

More generally, with respect to Signature Analysis:
Getting a correct 5V signature means your start/stop/clock signals are all
working properly.
Similarly, you should get a signature of "0000" anytime you probe ground.
You're then supposed to check the signatures at various nodes. You can do
this wholesale, but I find it helpful to follow the logical flow of the
circuit. For example, if there are three gates in a row (Input 1 -> output
1/input 2 -? output 2/input 3 -> output 3), then I would start by checking
the first input (input 1). If that signature is good, then I check the
output of that gate (output 1/input 2), if that signature is good, then the
gate 1 is good and I move on to check the output 2/input 3 node. You keep
moving along the flow of the circuit until you find a mismatch, which
indicates the bad component. Naturally, this flow might branch a lot as
opposed to the very linear example I've given here, so you just go down
each branch in a similar fashion.
Keep in mind that a bad signature could be either the driver of that node
or a bad input that is driven by that node. You may have to do some more
investigation to actually identify the failing component, such as lifting
the inputs driven by the node to verify that the signature is still bad,
thereby implicating the driver.

Dave Casey

On Wed, Nov 4, 2020 at 11:16 AM Michael W. Lynch via groups.io <mlynch003=
yahoo.com@groups.io> wrote:

All:

I am working on a 468 Scope. All voltages are within parameters both the
main and digital power supply sections. I have tested the analog section,
bypassing the Digital section. Analog seems to work fine. Unit passes the
Startup ROM test without error. Display is bright, clear and controllable
when the digital section is bypassed. With the digital section enabled,
there is no display in the "Non-Store" mode. Pushing the beam finder in
this condition yields two dots fixed near the right side of the CRT. In the
NORM Mode, there is a trace, but there are also various other issues with
the digital storage, depending on which combination of switches is in play;
too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost
perfect agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature checks
listed on Page 5-45. This is where I run out of knowledge, How do I
interpret the results? All is well, signatures match until I get to U550,
there I have all "BAD" signatures (308 flashes "FAILED") at all tested pins
except the 5V signature (Test #1), then the balance of signatures are good
until the end of TEST #1. Moving to U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"? Or is this a matter of
"Garbage in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!
--
Michael Lynch
Dardanelle, AR






Michael W. Lynch
 

On Wed, Nov 4, 2020 at 11:59 AM, Dave Casey wrote:
Interleaved Answers or Comments

Is the 308 programmed with an expected signature and telling you there's a
mismatch when it flashes "FAILED"?
A: Not Programmed in any way, that I know of. I just turned it on and attached the various probes to the 468 as described in the Kernel Test Section. Perhaps the "FAILED" comes in when I touch the probe to the pin? I will need to retest and pay closer attention.

Or is that a different kind of error
condition (such as the 308 not getting a good enough signal or noisy
signal)?
A: Quite Possible, see above.

I've only done SA with an HP5006A, which gives a readout of the signature;
it's then up to me to verify whether or not that output matches the table
in the DUT's manual. My recollection from reading the manual is that the
308 just lists the signatures on the screen as you capture them, but I've
never actually used one.
A: Yes, this is how I read the instructions as well. I have never used any sort of Logic or Signature Analyzer.


More generally, with respect to Signature Analysis:
Getting a correct 5V signature means your start/stop/clock signals are all
working properly.
A: Yes, since my voltmeter also reads 5V at those same test points

Similarly, you should get a signature of "0000" anytime you probe ground.
a: Yes, This also is true. So I am pretty certain that I am at least getting the basic connection and operation right.

You're then supposed to check the signatures at various nodes. You can do
this wholesale, but I find it helpful to follow the logical flow of the
circuit. For example, if there are three gates in a row (Input 1 -> output
1/input 2 -? output 2/input 3 -> output 3), then I would start by checking
the first input (input 1). If that signature is good, then I check the
output of that gate (output 1/input 2), if that signature is good, then the
gate 1 is good and I move on to check the output 2/input 3 node. You keep
moving along the flow of the circuit until you find a mismatch, which
indicates the bad component. Naturally, this flow might branch a lot as
opposed to the very linear example I've given here, so you just go down
each branch in a similar fashion.
A; Makes sense. I was just following the procedures outlined in the manual. Since I have no experience, this seemed like the best course of action. I need to study this "flow" as you call it, that seems to be where I lose touch with what is going on. I would have thought that the TEK Procedure would take you through the test(s) in some sort of orderly fashion?

Keep in mind that a bad signature could be either the driver of that node
or a bad input that is driven by that node. You may have to do some more
investigation to actually identify the failing component, such as lifting
the inputs driven by the node to verify that the signature is still bad,
thereby implicating the driver.
A: This also makes perfect sense, It very well could be "Garbage in-Garbage out" that is causing the problem with U550. I am still quite shaky on my understanding of how this all works. But I am very interested to learn as it should give me a better understanding of how these digital systems work.

Thanks Dave! You have been a big help. I am making small steps in the right direction, I hope.

--
Michael Lynch
Dardanelle, AR


Dave Casey
 

I wonder if the 308 has the ability to discern an untimely edge on the
signal being probed and that's why it reports "FAILED".
Signature analysis is akin to taking a checksum at various points in the
circuit. If the circuit it working properly, then the sum will match an
expected value.
When doing a checksum on a ROM (or a file), you have a finite quantity of
data (the beginning and end of the file). So similarly, when you test a
circuit, you need a finite number of samples. The "start" and "stop"
signals for the SA bound the number of samples. The "clock" is used to
determine when to take a sample. If the node being tested is not stable
w.r.t. the clock edge, then you won't get a consistent signature.
There is a good diagram in the 308 manual showing how the signature is
tabulated.
The 308 might be looking for a concurrence in signatures over multiple
sample periods and reporting "FAILED" when it doesn't see this. It might be
a good idea to look at the questionable node with a scope to see if it's
particularly noisy. You might simultaneously scope the "clock" and see if
there's any evidence of a race condition between the two.
When someone chooses the points for start/stop/clock, those choices are
done with the intention that the node under test will have a meaningful
number of state changes (otherwise you'd just get the 5V or GND
signatures). Those choices are also made to avoid possible race conditions
that would cause the data to be inconsistent.
It's also good to double check that the boundary conditions
(start/stop/clock and the edge polarity of each) are set correctly for the
node you're testing. There are sometimes subtle changes to the setup that
can be easily overlooked (e.g. in the DC510/5010 SA tables, the setup is
ALMOST always the same, but at least one table uses a different clock edge
polarity or some similarly subtle change).

Dave Casey

On Wed, Nov 4, 2020 at 12:30 PM Michael W. Lynch via groups.io <mlynch003=
yahoo.com@groups.io> wrote:

On Wed, Nov 4, 2020 at 11:59 AM, Dave Casey wrote:
Interleaved Answers or Comments

Is the 308 programmed with an expected signature and telling you there's
a
mismatch when it flashes "FAILED"?
A: Not Programmed in any way, that I know of. I just turned it on and
attached the various probes to the 468 as described in the Kernel Test
Section. Perhaps the "FAILED" comes in when I touch the probe to the pin?
I will need to retest and pay closer attention.

Or is that a different kind of error
condition (such as the 308 not getting a good enough signal or noisy
signal)?
A: Quite Possible, see above.

I've only done SA with an HP5006A, which gives a readout of the
signature;
it's then up to me to verify whether or not that output matches the table
in the DUT's manual. My recollection from reading the manual is that the
308 just lists the signatures on the screen as you capture them, but I've
never actually used one.
A: Yes, this is how I read the instructions as well. I have never used
any sort of Logic or Signature Analyzer.


More generally, with respect to Signature Analysis:
Getting a correct 5V signature means your start/stop/clock signals are
all
working properly.
A: Yes, since my voltmeter also reads 5V at those same test points

Similarly, you should get a signature of "0000" anytime you probe ground.
a: Yes, This also is true. So I am pretty certain that I am at least
getting the basic connection and operation right.

You're then supposed to check the signatures at various nodes. You can do
this wholesale, but I find it helpful to follow the logical flow of the
circuit. For example, if there are three gates in a row (Input 1 ->
output
1/input 2 -? output 2/input 3 -> output 3), then I would start by
checking
the first input (input 1). If that signature is good, then I check the
output of that gate (output 1/input 2), if that signature is good, then
the
gate 1 is good and I move on to check the output 2/input 3 node. You keep
moving along the flow of the circuit until you find a mismatch, which
indicates the bad component. Naturally, this flow might branch a lot as
opposed to the very linear example I've given here, so you just go down
each branch in a similar fashion.
A; Makes sense. I was just following the procedures outlined in the
manual. Since I have no experience, this seemed like the best course of
action. I need to study this "flow" as you call it, that seems to be where
I lose touch with what is going on. I would have thought that the TEK
Procedure would take you through the test(s) in some sort of orderly
fashion?

Keep in mind that a bad signature could be either the driver of that node
or a bad input that is driven by that node. You may have to do some more
investigation to actually identify the failing component, such as lifting
the inputs driven by the node to verify that the signature is still bad,
thereby implicating the driver.
A: This also makes perfect sense, It very well could be "Garbage
in-Garbage out" that is causing the problem with U550. I am still quite
shaky on my understanding of how this all works. But I am very interested
to learn as it should give me a better understanding of how these digital
systems work.

Thanks Dave! You have been a big help. I am making small steps in the
right direction, I hope.

--
Michael Lynch
Dardanelle, AR






Harvey White
 

A signature analyzer works by counting pulses, generally with a gate.  So, assume you have a PROM, and you are looking at the data output on one bit.  Many tek instruments (and I'd bet HP) have a mode where the processor is forced into a no-op mode, which performs continuous instruction fetches on memory (all of it). The processor never sees the real instruction, it sees only a hardwired no-op.

Attaching the signature analyzer to a data output should count the pulses that happen during the gating period, which might well be the CS line for the eprom.  You're effectively counting the bits set to 1 (or zero, or just transitions) at that pin.  The display (instead of normal hex, thank you) has an alias of the upper hex digits, and produces the signature you want.

Counting the set ones on each of the PROM pins for each data line gives you a good feeling for whether or not the prom is programmed correctly.

For general logic, you'd want to check an input, which then says whether or not the node (pin) driving the output is correct.  If the signature is wrong, I'd expect the driving source to be corrupted OR in parallel with a dead (loading the output to ground or VCC) input.  So if you find a chip where the signature is bad at an output, check the inputs to the chip.  If you find a chip where the input is bad, then check the signal driving that input.

It's a quick way to get a confidence check under controlled circumstances.

The same signature modes, for instance, when looking at the CS on the prom, ought to show you a low signal when the prom is read. Since all addresses are read (and repeat), you'll see a repeating square wave.  As you note, no transitions during a gating period gives you zeros, and if you're sampling the input at a clock edge, then VCC ought to give you a display equal to 0xFFFF.  However, it all depends on what the settings for the signature analyzer are.

IIRC, the 5005 and 308 give you the same outputs for the same input conditions.

Harvey

On 11/4/2020 12:16 PM, Michael W. Lynch via groups.io wrote:
All:

I am working on a 468 Scope. All voltages are within parameters both the main and digital power supply sections. I have tested the analog section, bypassing the Digital section. Analog seems to work fine. Unit passes the Startup ROM test without error. Display is bright, clear and controllable when the digital section is bypassed. With the digital section enabled, there is no display in the "Non-Store" mode. Pushing the beam finder in this condition yields two dots fixed near the right side of the CRT. In the NORM Mode, there is a trace, but there are also various other issues with the digital storage, depending on which combination of switches is in play; too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost perfect agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature checks listed on Page 5-45. This is where I run out of knowledge, How do I interpret the results? All is well, signatures match until I get to U550, there I have all "BAD" signatures (308 flashes "FAILED") at all tested pins except the 5V signature (Test #1), then the balance of signatures are good until the end of TEST #1. Moving to U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"? Or is this a matter of "Garbage in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!


Chuck Harris
 

The signature analyzer does a bit more than just count. It has a
standardized algorithm that it applies to the serial data it
acquires.

The 308 is entirely compatible with the HP analyzers.

The algorithm is done using a 16 bit shift register with feedback.

The display breaks the 16 bit shift register into 4, 4 bit coded
nibbles displayed as: 0-9, A, C, F, H, P, and U.

I'll leave it to your imagination as to why those letters were chosen
by HP.

The equation is:

SRIN = GDIN xor D7 xor D9 xor D12 xor D16

Where,
SRIN is the input to the shift register
GDIN is the gated data from the input probe, and
D1 to D16 are the shift register data bit outputs.

So, it is a form of a CRC.

There are 4 inputs to the signature analyzer:

Serial Data
Start (rising edge)
Stop (falling edge)
Clock (falling edge)

If the Start and Stop signals don't behave properly relative to the
clock, you will get a error indication on the screen.

-Chuck Harris

Harvey White wrote:

A signature analyzer works by counting pulses, generally with a gate.  So, assume you
have a PROM, and you are looking at the data output on one bit.  Many tek instruments
(and I'd bet HP) have a mode where the processor is forced into a no-op mode, which
performs continuous instruction fetches on memory (all of it). The processor never
sees the real instruction, it sees only a hardwired no-op.

Attaching the signature analyzer to a data output should count the pulses that happen
during the gating period, which might well be the CS line for the eprom.  You're
effectively counting the bits set to 1 (or zero, or just transitions) at that pin. 
The display (instead of normal hex, thank you) has an alias of the upper hex digits,
and produces the signature you want.

Counting the set ones on each of the PROM pins for each data line gives you a good
feeling for whether or not the prom is programmed correctly.

For general logic, you'd want to check an input, which then says whether or not the
node (pin) driving the output is correct.  If the signature is wrong, I'd expect the
driving source to be corrupted OR in parallel with a dead (loading the output to
ground or VCC) input.  So if you find a chip where the signature is bad at an output,
check the inputs to the chip.  If you find a chip where the input is bad, then check
the signal driving that input.

It's a quick way to get a confidence check under controlled circumstances.

The same signature modes, for instance, when looking at the CS on the prom, ought to
show you a low signal when the prom is read. Since all addresses are read (and
repeat), you'll see a repeating square wave.  As you note, no transitions during a
gating period gives you zeros, and if you're sampling the input at a clock edge, then
VCC ought to give you a display equal to 0xFFFF.  However, it all depends on what the
settings for the signature analyzer are.

IIRC, the 5005 and 308 give you the same outputs for the same input conditions.

Harvey


On 11/4/2020 12:16 PM, Michael W. Lynch via groups.io wrote:
All:

I am working on a 468 Scope.  All voltages are within parameters both the main and
digital power supply sections.  I have tested the analog section, bypassing the
Digital section.  Analog seems to work fine.  Unit passes the Startup ROM test
without error. Display is bright, clear and controllable when the digital section
is bypassed.   With the digital section enabled, there is no display in the
"Non-Store" mode.  Pushing the beam finder in this condition yields two dots fixed
near the right side of the CRT. In the NORM Mode, there is a trace, but there are
also various other issues with the digital storage, depending on which combination
of switches is in play; too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost perfect
agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature checks listed
on Page 5-45.  This is where I run out of knowledge, How do I interpret the
results?  All is well, signatures match until I get to U550, there I have all "BAD"
signatures (308 flashes "FAILED") at all tested pins except the 5V signature (Test
#1), then the balance of signatures are good until the end of TEST #1.  Moving to
U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"?  Or is this a matter of "Garbage
in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!





Dave Casey
 

The edges are defined for each application; if they're standardized then
not everyone follows the standard. There are buttons on the analyzer to
select the edge (rising or falling) for each of the signals (in the 308
this may not be a dedicated set of buttons since the 308 is more than just
a Signature Analyzer). The setup instructions/SA tables tell you which
edges to use for which signals to get the matching signatures.

Dave Casey

On Wed, Nov 4, 2020 at 2:51 PM Chuck Harris <cfharris@erols.com> wrote:

The signature analyzer does a bit more than just count. It has a
standardized algorithm that it applies to the serial data it
acquires.

The 308 is entirely compatible with the HP analyzers.

The algorithm is done using a 16 bit shift register with feedback.

The display breaks the 16 bit shift register into 4, 4 bit coded
nibbles displayed as: 0-9, A, C, F, H, P, and U.

I'll leave it to your imagination as to why those letters were chosen
by HP.

The equation is:

SRIN = GDIN xor D7 xor D9 xor D12 xor D16

Where,
SRIN is the input to the shift register
GDIN is the gated data from the input probe, and
D1 to D16 are the shift register data bit outputs.

So, it is a form of a CRC.

There are 4 inputs to the signature analyzer:

Serial Data
Start (rising edge)
Stop (falling edge)
Clock (falling edge)

If the Start and Stop signals don't behave properly relative to the
clock, you will get a error indication on the screen.

-Chuck Harris

Harvey White wrote:
A signature analyzer works by counting pulses, generally with a gate.
So, assume you
have a PROM, and you are looking at the data output on one bit. Many
tek instruments
(and I'd bet HP) have a mode where the processor is forced into a no-op
mode, which
performs continuous instruction fetches on memory (all of it). The
processor never
sees the real instruction, it sees only a hardwired no-op.

Attaching the signature analyzer to a data output should count the
pulses that happen
during the gating period, which might well be the CS line for the
eprom. You're
effectively counting the bits set to 1 (or zero, or just transitions) at
that pin.
The display (instead of normal hex, thank you) has an alias of the upper
hex digits,
and produces the signature you want.

Counting the set ones on each of the PROM pins for each data line gives
you a good
feeling for whether or not the prom is programmed correctly.

For general logic, you'd want to check an input, which then says whether
or not the
node (pin) driving the output is correct. If the signature is wrong,
I'd expect the
driving source to be corrupted OR in parallel with a dead (loading the
output to
ground or VCC) input. So if you find a chip where the signature is bad
at an output,
check the inputs to the chip. If you find a chip where the input is
bad, then check
the signal driving that input.

It's a quick way to get a confidence check under controlled
circumstances.

The same signature modes, for instance, when looking at the CS on the
prom, ought to
show you a low signal when the prom is read. Since all addresses are
read (and
repeat), you'll see a repeating square wave. As you note, no
transitions during a
gating period gives you zeros, and if you're sampling the input at a
clock edge, then
VCC ought to give you a display equal to 0xFFFF. However, it all
depends on what the
settings for the signature analyzer are.

IIRC, the 5005 and 308 give you the same outputs for the same input
conditions.

Harvey


On 11/4/2020 12:16 PM, Michael W. Lynch via groups.io wrote:
All:

I am working on a 468 Scope. All voltages are within parameters both
the main and
digital power supply sections. I have tested the analog section,
bypassing the
Digital section. Analog seems to work fine. Unit passes the Startup
ROM test
without error. Display is bright, clear and controllable when the
digital section
is bypassed. With the digital section enabled, there is no display in
the
"Non-Store" mode. Pushing the beam finder in this condition yields two
dots fixed
near the right side of the CRT. In the NORM Mode, there is a trace, but
there are
also various other issues with the digital storage, depending on which
combination
of switches is in play; too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost
perfect
agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature
checks listed
on Page 5-45. This is where I run out of knowledge, How do I interpret
the
results? All is well, signatures match until I get to U550, there I
have all "BAD"
signatures (308 flashes "FAILED") at all tested pins except the 5V
signature (Test
#1), then the balance of signatures are good until the end of TEST #1.
Moving to
U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"? Or is this a matter of
"Garbage
in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!









Michael W. Lynch
 

Dave, Harvey and Chuck,

Thanks for all the great information! I have a lot to learn and a lot of things to consider. I am going to digest and test what you have explained. I know you each know this stuff like the back of you hand; unfortunately, this is still like looking into a bowl of spaghetti noodles for me. Still looking for that "light bulb" to come on! I am pleased that I was able to get this far and look to learn more as I learn from you guys and others about this product and the digital system. One good thing that came out of this was that my 308 Logic Analyzer actually functions properly and I have used it more or less correctly.

Sincerely,

--
Michael Lynch
Dardanelle, AR


Chuck Harris
 

Yes, I recall that is true. The manual didn't say so in
the section that has the algorithm.

The settings are on the CRT, and you use a combination of
buttons a cursors to set things up.

My point was there are multiple gate signals to qualify the
serial data being monitored, and that the signature is not a
simple sum, but rather a CRC type algorithm.

-Chuck

Dave Casey wrote:

The edges are defined for each application; if they're standardized then
not everyone follows the standard. There are buttons on the analyzer to
select the edge (rising or falling) for each of the signals (in the 308
this may not be a dedicated set of buttons since the 308 is more than just
a Signature Analyzer). The setup instructions/SA tables tell you which
edges to use for which signals to get the matching signatures.

Dave Casey

On Wed, Nov 4, 2020 at 2:51 PM Chuck Harris <cfharris@erols.com> wrote:

The signature analyzer does a bit more than just count. It has a
standardized algorithm that it applies to the serial data it
acquires.

The 308 is entirely compatible with the HP analyzers.

The algorithm is done using a 16 bit shift register with feedback.

The display breaks the 16 bit shift register into 4, 4 bit coded
nibbles displayed as: 0-9, A, C, F, H, P, and U.

I'll leave it to your imagination as to why those letters were chosen
by HP.

The equation is:

SRIN = GDIN xor D7 xor D9 xor D12 xor D16

Where,
SRIN is the input to the shift register
GDIN is the gated data from the input probe, and
D1 to D16 are the shift register data bit outputs.

So, it is a form of a CRC.

There are 4 inputs to the signature analyzer:

Serial Data
Start (rising edge)
Stop (falling edge)
Clock (falling edge)

If the Start and Stop signals don't behave properly relative to the
clock, you will get a error indication on the screen.

-Chuck Harris

Harvey White wrote:
A signature analyzer works by counting pulses, generally with a gate.
So, assume you
have a PROM, and you are looking at the data output on one bit. Many
tek instruments
(and I'd bet HP) have a mode where the processor is forced into a no-op
mode, which
performs continuous instruction fetches on memory (all of it). The
processor never
sees the real instruction, it sees only a hardwired no-op.

Attaching the signature analyzer to a data output should count the
pulses that happen
during the gating period, which might well be the CS line for the
eprom. You're
effectively counting the bits set to 1 (or zero, or just transitions) at
that pin.
The display (instead of normal hex, thank you) has an alias of the upper
hex digits,
and produces the signature you want.

Counting the set ones on each of the PROM pins for each data line gives
you a good
feeling for whether or not the prom is programmed correctly.

For general logic, you'd want to check an input, which then says whether
or not the
node (pin) driving the output is correct. If the signature is wrong,
I'd expect the
driving source to be corrupted OR in parallel with a dead (loading the
output to
ground or VCC) input. So if you find a chip where the signature is bad
at an output,
check the inputs to the chip. If you find a chip where the input is
bad, then check
the signal driving that input.

It's a quick way to get a confidence check under controlled
circumstances.

The same signature modes, for instance, when looking at the CS on the
prom, ought to
show you a low signal when the prom is read. Since all addresses are
read (and
repeat), you'll see a repeating square wave. As you note, no
transitions during a
gating period gives you zeros, and if you're sampling the input at a
clock edge, then
VCC ought to give you a display equal to 0xFFFF. However, it all
depends on what the
settings for the signature analyzer are.

IIRC, the 5005 and 308 give you the same outputs for the same input
conditions.

Harvey


On 11/4/2020 12:16 PM, Michael W. Lynch via groups.io wrote:
All:

I am working on a 468 Scope. All voltages are within parameters both
the main and
digital power supply sections. I have tested the analog section,
bypassing the
Digital section. Analog seems to work fine. Unit passes the Startup
ROM test
without error. Display is bright, clear and controllable when the
digital section
is bypassed. With the digital section enabled, there is no display in
the
"Non-Store" mode. Pushing the beam finder in this condition yields two
dots fixed
near the right side of the CRT. In the NORM Mode, there is a trace, but
there are
also various other issues with the digital storage, depending on which
combination
of switches is in play; too many to describe at this point.

The Microprocessor KERNEL Test Wave forms #135 through #145 are almost
perfect
agreement with the manual.

I have a 308 Logic Analyzer and have done the Kernel Test Signature
checks listed
on Page 5-45. This is where I run out of knowledge, How do I interpret
the
results? All is well, signatures match until I get to U550, there I
have all "BAD"
signatures (308 flashes "FAILED") at all tested pins except the 5V
signature (Test
#1), then the balance of signatures are good until the end of TEST #1.
Moving to
U378 Test #2 failed completely.

Does this mean that U550 and or U378 are "Bad"? Or is this a matter of
"Garbage
in-Garbage out"?

Thoughts, comments, advice and criticism are welcomed!

Thanks!













Michael W. Lynch
 

Chuck,

Actually setting up the 308 was pretty much reading and following the instructions in the manuals, then getting the probes on the correct pins. Not a lot of in depth knowledge needed at this point. I am living proof of that,

Thanks Again!

--
Michael Lynch
Dardanelle, AR


Michael W. Lynch
 

A little bit of History, on Nov 4, 2020 I wrote the following:


I am working on a 468 Scope. All voltages are within parameters both the main and digital power supply sections. I have tested the analog section, bypassing the Digital section. Analog seems to work fine. Unit passes the Startup ROM >test without error. Display is bright, clear and controllable when the digital section is bypassed. With the digital section enabled, there is no display in the "Non-Store" mode. Pushing the beam finder in this condition yields two dots fixed >near the right side of the CRT. In the NORM Mode, there is a trace, but there are also various other issues with the digital storage, depending on which combination of switches is in play; too many to describe at this point.
The Microprocessor KERNEL Test Wave forms #135 through #145 are almost perfect agreement with the manual.
I have a 308 Logic Analyzer and have done the Kernel Test Signature checks listed on Page 5-45. This is where I run out of knowledge, How do I interpret the results? All is well, signatures match until I get to U550, there I have all "BAD" >signatures (308 flashes "FAILED") at all tested pins except the 5V signature (Test #1), then the balance of signatures are good until the end of TEST #1. Moving to U378 Test #2 failed completely.
Does this mean that U550 and or U378 are "Bad"? Or is this a matter of "Garbage in-Garbage out"?
It was indeed that latter case, that is "Garbage in-Garbage out". I suspected a problem with the CRT Blanking circuit and the Vertical Switching circuits, since the Vertical amp was outputting a good replica of the signal at the input BNC and I also get a spot or trace when the beam finder is depressed. Further testing with the signatures seems futile, so now it is time to dig into the individual components, concentrating on the Vertical Switching Logic.

First, checking U408,U409, U508 and U509 on the A11 board, I found high signals where there should have been low and lows where there should have been highs. Vertical modes switches did not alter the pattern of highs and lows. So the switch positions had no effect on the unit in the digital mode.

Searching the Theory of Operation, Schematic and then to boards, I found that there was indeed a "Sweep Disable" signal present at P130-7 on A14 Vertical Mode Switch board. I pulled the wire for that blanking signal and immediately got a trace of sorts on the scope in "Non-Store". . . Progress!

Most symptoms pointing towards "faulty" logic IC somewhere, possibly on A14? The Detailed Circuit Description has a lot so say about U310, so that became the most likely suspect of the IC's on A14. Now to get to that pesky A14 board. Removed A11 to access A14 and found U310 was in a socket, could it be this "simple"?? Obviously, U310 was the first and easiest part to test, not to mention being a "key" part of the system. Sure enough that 74LS377 tested as "FAILED". I ordered and replaced U310 and temporarily reassembled the A11 board onto the scope with minimum connections and it worked perfectly.

So U310 appears to be the only issue that I had. I will check the calibrations before I put it back in the case. However, It is looking very positive, pointing toward a successful repair.

Thanks to all on this forum who have taught me the lessons required to make a successful repair.

Sincerely,

--
Michael Lynch
Dardanelle, AR