Re: 475 Time Base Setting Problem

I have yet to see a worn cam; they do not have much force on them.

What I have seen is the angle on the switch element not sharp enough
such that the cam could not fully depress it. I fixed these by using
tweezers to bend the switch element.

On Fri, 6 Nov 2015 10:56:29 -0500, you wrote:

Is it possible I have a broken or worn cam on switch 8 or 9 in the 50mS setting? That would explain the 0v on P5-7 in that setting. I don't think it would explain the problems on the other settings, though. Just a thought.

John

To: tekscopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 09:55:40 -0500
Subject: RE: [TekScopes] Re: 475 Time Base Setting Problem

Thanks Raymond,
I'm just puzzled. One check indicates R1083/R1084 or Switch 9 are open yet another check indicates they're not.

John

Re: 475 Time Base Setting Problem

John Clark

OK, if we're just talking about display of a signal and calculating frequency I know it has been fairly close but likely in need of minor calibration.

I do have an Instek GFG-8219A that has a digital display connected with a 50ohm terminator that currently gives the following results:

A 1.000khz triangle signal displays .952kHz on the scope at the .2mS setting.

A 100.00khz triangle signal displays 980kHz on the scope at the 2uS setting.

The scope's calibrator 1kHz signal displays .934kHz.

Thanks,
John

To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 07:37:11 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem

> Any relatively stable frequency source like a function generator can

> be used if you have a frequency counter.

I expect the timing to be 10's of %'s off if the integrator isn't ok. No counter needed, just ballpark figures, looking at the screen.

@ John Clark:

John, I quickly went through your reasoning. The values in blue in Tek's manuals aren't cut in stone. They give a direction. A few tenths of volts difference on its own to me is less impressive than the other signals (sw 9 circuit), even if it's relatively large, compared with its absolute value. A volt or more difference here would make me think.

Raymond

[Non-text portions of this message have been removed]

Re: 475 Time Base Setting Problem

John Clark

Is it possible I have a broken or worn cam on switch 8 or 9 in the 50mS setting? That would explain the 0v on P5-7 in that setting. I don't think it would explain the problems on the other settings, though. Just a thought.

John

To: tekscopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 09:55:40 -0500
Subject: RE: [TekScopes] Re: 475 Time Base Setting Problem

Thanks Raymond,
I'm just puzzled. One check indicates R1083/R1084 or Switch 9 are open yet another check indicates they're not.

John

Re: 475 Time Base Setting Problem

John Clark

Are you sure? It looks to me like the .5uS setting opens switch #8 so the only way to get voltage is through all the series resistors and Switch #9.

John

To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 07:20:03 -0800
Subject: RE: [TekScopes] Re: 475 Time Base Setting Problem

John:

I think in the 0.5uS position (assuming you have S1070A closed), then 50V " flows" as follows: S7, S14 then R1089. All the resistors bar R1089 are shorted by S14 / S7 combo.

John

[Non-text portions of this message have been removed]

[Non-text portions of this message have been removed]

Re: 475 Time Base Setting Problem

I think in the 0.5uS position (assuming you have S1070A closed), then 50V " flows" as follows: S7,
S14 then R1089. All the resistors bar R1089 are shorted by S14 / S7 combo.
I don't think that's correct: S8 is open.

Raymond

Re: 475 Time Base Setting Problem

Any relatively stable frequency source like a function generator can
> be used if you have a frequency counter.
I expect the timing to be 10's of %'s off if the integrator isn't ok. No counter needed, just ballpark figures, looking at the screen.

@ John Clark:
John, I quickly went through your reasoning. The values in blue in Tek's manuals aren't cut in stone. They give a direction. A few tenths of volts difference on its own to me is less impressive than the other signals (sw 9 circuit), even if it's relatively large, compared with its absolute value. A volt or more difference here would make me think.

Raymond

Re: 475 Time Base Setting Problem

Any relatively stable frequency source like a function generator can
be used if you have a frequency counter.

On Fri, 6 Nov 2015 09:55:40 -0500, you wrote:

Thanks Raymond,

I believe I need a Time Mark Generator for that and, unfortunately, I'm flying blind there as I don't have one.

I'm still planning on disassembling and cleaning the cam switches but I want to make sure I check all possibilities when I'm in there so I don't have to go back in again after a cleaning and re-check. Obviously I'll check R1083 and R1084 but I don't think they're open...out of tolerance maybe, but not open. I'm just puzzled. One check indicates R1083/R1084 or Switch 9 are open yet another check indicates they're not.

John

To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 06:20:35 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem

...

It may still be worthwhile to check whether the working tim/div settings are correct within a few %.. If they are, I wouldn't worry about the close-to-zero (wrong?) voltage you find even at those apparently working speeds.

After all, there might be a failure somewhere in the integrator that allows it to operate at all but the highest-ohmic settings. If most timings are ok, that possibility becomes very unlikely.

Raymond

Re: 475 Time Base Setting Problem

John

John:

I think in the 0.5uS position (assuming you have S1070A closed), then 50V " flows" as follows: S7, S14 then R1089. All the resistors bar R1089 are shorted by S14 / S7 combo.

John

Re: 475 Time Base Setting Problem

I believe I need a Time Mark Generator for that and, unfortunately, I'm flying blind there as I don't have one.
>
I probably haven't been clear. If you use your 'scope to look at the ~1 KHz calibrator signal and a 60 or 120 Hz mains signal using different tim/div settings, you'll get an impression. I expect values to be way off if it's an integrator problem. Obviously, I'm not trying to push you. It just seems so simple and quick to do. However, I believe you'll find the times to be ok.

I'm still planning on disassembling and cleaning the cam switches but I want to make sure I check all
possibilities when I'm in there so I don't have to go back in again after a cleaning and re-check.
Obviously I'll check R1083 and R1084 but I don't think they're open...out of tolerance maybe, but not open.
I'm just puzzled. One check indicates R1083/R1084 or Switch 9 are open yet another check indicates they're
not.
I don't expect anyone to put in the hours I have. I just thought if there was someone out there who
knows more about the circuit than me they might be able to explain what I'm seeing before I tear
into removing those boards.
I fully understand and appreciate, John. It's just a challenge to me and it would be nice if I could help.

Raymond

Re: AM503B current amplifier questions.

stefan_trethan

It's not floating and it's no different with the probe connected,
however difficult this may be to believe for us.
Perhaps the AM503A schematic is wrong and there isn't 3V there, has
anyone actually checked on a AM503A?

ST

On Thu, Nov 5, 2015 at 7:49 PM, aodiversen@concepts.nl [TekScopes]
<TekScopes@yahoogroups.com> wrote:
Could the supply voltages at connector A and D be floating w.r.t. ground? Did you also measure between A and D?
Albert

---In TekScopes@yahoogroups.com, <stefan_trethan@...> wrote :

Yes, A and D, sorry.
Perhaps the voltage is lower with the probe disconnected?
The amp is fully functional, I just performance tested it the other
day together with that other amp I fixed.

ST

------------------------------------
Posted by: aodiversen@concepts.nl
------------------------------------

------------------------------------

Yahoo Groups Links

Re: 475 Time Base Setting Problem

John Clark

I understand, Raymond. I really appreciate the help you, and everyone else, has provided already. I've got a lot of time in studying the diagram and checking what I can with a DMM. I don't expect anyone to put in the hours I have. I just thought if there was someone out there who knows more about the circuit than me they might be able to explain what I'm seeing before I tear into removing those boards.

John

To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 06:42:17 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem

My time is very limited at the moment so I've avoided following your detailed description...

I'll try and see if I can confirm what you're saying re. circuit paths and voltage.

AFAIK, the 'scope is still operational so it should be easy to get an idea about timings. I'd expect them to be several 10's of off if there's a problem iin the integrator. OTOH, good values (few %) would be further support for the sw. pos. 9 circuit failure.

If the timings are sort of ok, even in positions where the voltage isn't understood, I would leave trying to understand that for later.

Still, I'll try and follow your description of the low-voltage findings.

Raymond

[Non-text portions of this message have been removed]

Re: TDS520 problem

alfa beta

wow Siggi !
I'm going to check the beast with a varying DC on CH2 Will post the pics in the album

----- Original Message -----
From: Sigurður Ásgeirsson siggi@undo.com [TekScopes]
To: TekScopes@yahoogroups.com
Sent: Friday, November 06, 2015 3:31 PM
Subject: Re: [TekScopes] TDS520 problem

Hey Adri,

check this out:
https://docs.google.com/spreadsheets/d/1e0dgVVgFcP2gGTa8Z8X4Z88gdzFuHal3OJlJbwn8spE/edit#gid=777902241.
This is a simulation of a stuck second-order bit on one of the ADC's two
outputs. Bears a likeness to your images - right?

So, given this, I'm pretty sure now that you have a stuck second-order bit,
the question is where.
The options are:

1. An open on one of the ADC's output channels.
This would manifest as a problem on every other sample, when you're
going at 250MS/s (the max sampling rate for one ADC).
2. A bad RAM chip.
This would manifest as a problem on every eight sample, probably
irrespective the sample rate, but for sure at 250MS/s.
3. A bad MUX.
Let's hope this is not the case, as I don't think these are easy to come
by.
4. A stuck bit somewhere else.
I can't think where there could be a stuck bit manifesting precisely
like this, so let's ignore that possibility :).

Note that varying the input offset and magnitude of the input will hange
the manifestation of the stuck bit, and hopefully you can repro the trouble
with DC.
I forget (or never knew) whether this scope will inject a DC offset to the
input channel when you adjust the trace position, but for sure it'll inject
a DC offset when you adjust the input offset in the vertical menu.

Siggi

On Thu, 5 Nov 2015 at 22:08 Sigurður Ásgeirsson <siggi@undo.com> wrote:

> The other possibility that'd fit the facts so far, is if there's a stuck
> bit on the ADC outputs, due e.g. to a broken trace or such. Did you do any
> repair in the vicinity of U700?
>
> Again, playing with DC inputs will help, as that'll narrow the options. A
> stuck line from the ADC should manifest in every other sample, and at lower
> speeds, it's possible that only half of the output lines are used
> (explaining why this doesn't hit at all settings, all the time on CH2).
>
> So, ET off, both channels on (to force interleaving off), sin(x)/x off,
> dots mode if available, 1M input impedance.
> Input DC on CH2 and vary voltage or offset to full scale positive and
> negative. If this reproduces the issue, take note of whether it affects the
> entire sample record, or a fraction. What's the distance between anomalous
> samples?
> Take note of whether and how the trace follows the input voltage.
>
> On Thu, Nov 5, 2015 at 18:48 Sigurður Ásgeirsson <siggi@undo.com> wrote:
>
>> On Thu, 5 Nov 2015 at 15:11 'adri' tncdrn@gmail.com [TekScopes] <
>> TekScopes@yahoogroups.com> wrote:
>>
>>> So you think it might be a defective memory IC
>>>
>> I don't see anything inconsistent with that hypothesis in your pictures.
>> Looking at the A10 schematic, it looks like there are eight distinct CS
>> lines, and the RAM is written four-byte (64 bit) wide.
>>
>> If you look closely at your captures, I think you'll see that on CH2,
>> every fourth sample is bad, for half of the total capture record.
>> When this hits on CH1, you should see every eight sample is bad, again
>> for a total of half the waveform record.
>>
>> To look at this closer, turn ET off, turn sin(x)/x off, if this scope has
>> a dots mode, turn that on (instead of vectors), and you should be able to
>> count pixels/samples.
>>
>> ... time passes ...
>>
>> Actually, looking closer at your pictures, I'm starting to wonder,
>> because it looks like the "noise" always hits at the top and bottom of the
>> signal. If this is a RAM chip, then that'd mean the same chip is getting
>> hit for the same portion of the signal each time, and I can't think why
>> that would happen.
>>
>> I think we should be able to distinguish RAM vs DAC/MUX failure by
>> playing with DC inputs to the scope - see below.
>>
>>> Do you know if the ICs are currently available ?
>>>
>> I'd be very surprised if they aren't - these are just 2K (or 8K) static
>> RAMs.
>>
>>> And what about raising one (or more) pin to re-create the problem and
>>> validate the hypotesis ?
>>>
>> You could do that, but there are 64 total pins to try :/.
>> Can you reproduce this problem with a DC signal, and do you have a second
>> (storage) scope to diagnose this?
>>
>> Try putting your signal gen on AUX (or CH1) and trigger on it there, then
>> look whether you get a messed-up waveform on screen with DC on the input.
>> From your pics it looks like you might have a stuck bit, so play with the
>> DC input. You can also ground the input and play with the input offset for
>> the same effect as inputting DC.
>>
>> Assuming you can provoke the problem with a DC signal (or offset) you
>> could narrow this down to a chip by looking at the data lines (there's 64)
>> and looking for the the bit that looks bad.
>>
>

[Non-text portions of this message have been removed]

Re: 475 Time Base Setting Problem

John Clark

Thanks Raymond,
I believe I need a Time Mark Generator for that and, unfortunately, I'm flying blind there as I don't have one.

I'm still planning on disassembling and cleaning the cam switches but I want to make sure I check all possibilities when I'm in there so I don't have to go back in again after a cleaning and re-check. Obviously I'll check R1083 and R1084 but I don't think they're open...out of tolerance maybe, but not open. I'm just puzzled. One check indicates R1083/R1084 or Switch 9 are open yet another check indicates they're not.

John

To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 06:20:35 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem

> However, even if it was out of its detent it would still get some amount of voltage from R1070, right?

Sure, anything between +50 V and +15 V.

Either R1083 or R1084 has effectively gone o/c. is my hunch

Definitely, since sw. pos. 9 and its circuit still is a strong candidate. The sudden and complete failure of the affected timings speaks for a broken R over a bad switch contact.

It may still be worthwhile to check whether the working tim/div settings are correct within a few %.. If they are, I wouldn't worry about the close-to-zero (wrong?) voltage you find even at those apparently working speeds.

After all, there might be a failure somewhere in the integrator that allows it to operate at all but the highest-ohmic settings. If most timings are ok, that possibility becomes very unlikely.

Raymond

[Non-text portions of this message have been removed]

[Non-text portions of this message have been removed]

Re: 7000-series Ch2 invert switch on vertical plug-ins

Colin Herbert

Hi,

Generally speaking, the "distinct" movement I mentioned is 0.3 division
(where 1 division is ~1cm). It varies a bit from amplifier to amplifier.

Colin.

From: TekScopes@yahoogroups.com [mailto:TekScopes@yahoogroups.com]
Sent: 03 November 2015 17:32
To: TekScopes@yahoogroups.com
Subject: [TekScopes] Re: 7000-series Ch2 invert switch on vertical plug-ins

A spot check on my 7904 with the ch2 input grounded shows:

7A26 No1 no movement
7A26 No2 about 0.1 division movement
7A24 about 0.1 division movement, maybe less

All of these use the Tektronix IC amplifiers rather than discrete
transistors as in the 7A18. How big is your 'distinct' movement?

Roger

Re: 475 Time Base Setting Problem

My time is very limited at the moment so I've avoided following your detailed description...
I'll try and see if I can confirm what you're saying re. circuit paths and voltage.
AFAIK, the 'scope is still operational so it should be easy to get an idea about timings. I'd expect them to be several 10's of off if there's a problem iin the integrator. OTOH, good values (few %) would be further support for the sw. pos. 9 circuit failure.
If the timings are sort of ok, even in positions where the voltage isn't understood, I would leave trying to understand that for later.
Still, I'll try and follow your description of the low-voltage findings.

Raymond

Re: 475 Time Base Setting Problem

John Clark

John,
Thanks for the help! That was my hunch, as well. However, if I set the time to .5uS (a problematic time setting) that opens switch #15, closes switch #14, closes switch #9, and opens switch #8. This feeds 50V through all the series resistors (R1083-R1088,) switch #9 and back through switch #14 to P5-5. Since I still get -.556VDC on P5-5
on that setting doesn't that mean switch #9 and R1083 and R1084 are not open
and not dirty enough to bring the .6VDC out of spec? If R1083, R1084,
and/or switch #9 were o/c I wouldn't get that voltage. Maybe I'm missing something...

John
To: TekScopes@yahoogroups.com
From: TekScopes@yahoogroups.com
Date: Fri, 6 Nov 2015 06:04:28 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem

Either R1083 or R1084 has effectively gone o/c. is my hunch

John

[Non-text portions of this message have been removed]

Re: TDS520 problem

Siggi

Hey Adri,

check this out:
https://docs.google.com/spreadsheets/d/1e0dgVVgFcP2gGTa8Z8X4Z88gdzFuHal3OJlJbwn8spE/edit#gid=777902241.
This is a simulation of a stuck second-order bit on one of the ADC's two
outputs. Bears a likeness to your images - right?

So, given this, I'm pretty sure now that you have a stuck second-order bit,
the question is where.
The options are:

1. An open on one of the ADC's output channels.
This would manifest as a problem on every other sample, when you're
going at 250MS/s (the max sampling rate for one ADC).
2. A bad RAM chip.
This would manifest as a problem on every eight sample, probably
irrespective the sample rate, but for sure at 250MS/s.
3. A bad MUX.
Let's hope this is not the case, as I don't think these are easy to come
by.
4. A stuck bit somewhere else.
I can't think where there could be a stuck bit manifesting precisely
like this, so let's ignore that possibility :).

Note that varying the input offset and magnitude of the input will hange
the manifestation of the stuck bit, and hopefully you can repro the trouble
with DC.
I forget (or never knew) whether this scope will inject a DC offset to the
input channel when you adjust the trace position, but for sure it'll inject
a DC offset when you adjust the input offset in the vertical menu.

Siggi

On Thu, 5 Nov 2015 at 22:08 Sigurður Ásgeirsson <siggi@undo.com> wrote:

The other possibility that'd fit the facts so far, is if there's a stuck
bit on the ADC outputs, due e.g. to a broken trace or such. Did you do any
repair in the vicinity of U700?

Again, playing with DC inputs will help, as that'll narrow the options. A
stuck line from the ADC should manifest in every other sample, and at lower
speeds, it's possible that only half of the output lines are used
(explaining why this doesn't hit at all settings, all the time on CH2).

So, ET off, both channels on (to force interleaving off), sin(x)/x off,
dots mode if available, 1M input impedance.
Input DC on CH2 and vary voltage or offset to full scale positive and
negative. If this reproduces the issue, take note of whether it affects the
entire sample record, or a fraction. What's the distance between anomalous
samples?
Take note of whether and how the trace follows the input voltage.

On Thu, Nov 5, 2015 at 18:48 Sigurður Ásgeirsson <siggi@undo.com> wrote:

On Thu, 5 Nov 2015 at 15:11 'adri' tncdrn@gmail.com [TekScopes] <
TekScopes@yahoogroups.com> wrote:

So you think it might be a defective memory IC
I don't see anything inconsistent with that hypothesis in your pictures.
Looking at the A10 schematic, it looks like there are eight distinct CS
lines, and the RAM is written four-byte (64 bit) wide.

If you look closely at your captures, I think you'll see that on CH2,
every fourth sample is bad, for half of the total capture record.
When this hits on CH1, you should see every eight sample is bad, again
for a total of half the waveform record.

To look at this closer, turn ET off, turn sin(x)/x off, if this scope has
a dots mode, turn that on (instead of vectors), and you should be able to
count pixels/samples.

... time passes ...

Actually, looking closer at your pictures, I'm starting to wonder,
because it looks like the "noise" always hits at the top and bottom of the
signal. If this is a RAM chip, then that'd mean the same chip is getting
hit for the same portion of the signal each time, and I can't think why
that would happen.

I think we should be able to distinguish RAM vs DAC/MUX failure by
playing with DC inputs to the scope - see below.

Do you know if the ICs are currently available ?
I'd be very surprised if they aren't - these are just 2K (or 8K) static
RAMs.

And what about raising one (or more) pin to re-create the problem and
validate the hypotesis ?
You could do that, but there are 64 total pins to try :/.
Can you reproduce this problem with a DC signal, and do you have a second
(storage) scope to diagnose this?

Try putting your signal gen on AUX (or CH1) and trigger on it there, then
look whether you get a messed-up waveform on screen with DC on the input.
From your pics it looks like you might have a stuck bit, so play with the
DC input. You can also ground the input and play with the input offset for
the same effect as inputting DC.

Assuming you can provoke the problem with a DC signal (or offset) you
could narrow this down to a chip by looking at the data lines (there's 64)
and looking for the the bit that looks bad.

[Non-text portions of this message have been removed]

Re: 475 Time Base Setting Problem

However, even if it was out of its detent it would still get some amount of voltage from R1070, right?
Sure, anything between +50 V and +15 V.

Either R1083 or R1084 has effectively gone o/c. is my hunch
Definitely, since sw. pos. 9 and its circuit still is a strong candidate. The sudden and complete failure of the affected timings speaks for a broken R over a bad switch contact.

It may still be worthwhile to check whether the working tim/div settings are correct within a few %.. If they are, I wouldn't worry about the close-to-zero (wrong?) voltage you find even at those apparently working speeds.
After all, there might be a failure somewhere in the integrator that allows it to operate at all but the highest-ohmic settings. If most timings are ok, that possibility becomes very unlikely.

Raymond

Re: 475 Time Base Setting Problem

John

Either R1083 or R1084 has effectively gone o/c. is my hunch

John

Re: Tek 2230 PSU

On 06 Nov 2015 03:57:32 -0800, you wrote:

Hi All,

I was hoping for some advice on the power supply of a 2230 I'm working on.

I received the unit with mains fuse blown. Checked and found shorted rectifiers in the main bridge. I also found C904 cracked and with evidence of arcing. I found many of the LV electrolytics on both sides of the PSU having very poor ESR so I replaced pretty well all the electrolytics.

I then powered the unit up; no fuse blowing. However, the 43V supply to the inverter was not existent and C925 not charging up to power the preregulator. I did some more checking and found Q908 shorted, R909 open and C944 shorted. The FET Q9070 isn't shorted but I've not checked that it actually works.

Further, measuring resistance across C925 gives only 25ohms (having lifted R907, CR920). Is this normal or is it likely U930 is cooked too?
I do not see how Q908 and R909 could be bad without Q9070 and U930
also being bad.

C944 being shorted is also a bit interesting and leaves me wondering how much else of this power supply I should be suspicious of.
I would be suspicious of everything except high value resistors at
this point.

At present, replacing the components I know to be bad and powering up doesn't seem to to be the best idea given I don't know the cause of the issue.

...

Any thoughts?
These power supplies tend to go big when they fail so I would plan on
testing every part and replacing every semiconductor and aluminum
electrolytic capacitor. There are modern replacements for every part
except the transformers.

If you have a suitable power supply, the inverter can be disconnected
from the preregulator and tested separately. The preregulator can be
tested using a 42.8 volt load.

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