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  2. TDS540 Calibration Procedure??

Re: TDS540 Calibration Procedure??

Denis Cobley <denis.cobley@...>
 

Hi
SPC has to pass before you attempt any cal adjustments - if SPC failed then
you still have a 95% chance of a hardware problem.
You seem to have a DAC problem.
The DAC system is located on the front section of the acquisition board -
this controls the gains and offsets for all channels (including trigger and
position levels).
This is a description based on my reverse engineering of the board so may
not be totally reliable.
Hope it helps.
DAC System

The DAC system consists of a main DAC (U900) an AD667, a number of switch IC
's and the sample & hold Op Amp's.

The DAC output is on pin 9. This goes to large number of various IC switches
in the area of the board from U900 to Ch1 input connector and behind the
Attenuator connector J1153. The DAC system uses a combination of 4051 CMOS
(8 to 1 switches), DG444 (4 x SPST CMOS switches) which demultiplex the DAC
output to DC levels for various functions (Trigger level, Vertical gain,
offset, DC balance). These outputs are fed to Sample & Hold circuits using
TL074 and other Op Amps.

A typical path is the A Trigger Level. This comes from the DAC, is
demultiplexed by a 4051 (U931 pin 3 as the input) and outputted via pin 13
to a TL074 (pin 5). This Sample and hold Op Amp outputs the Trigger Level
(+/- 700mV DC ) to the Trigger Amp (U1552 pin 16) from it's output pin 7.

The DAC system refresh rate seems to be 6.06ms.

Regards
Denis Cobley
www.newteksupport.com

----- Original Message -----
From: "gettingalongwouldbenice" <gettingalongwouldbenice@yahoo.com>
To: <TekScopes@yahoogroups.com>
Sent: Thursday, August 19, 2004 5:41 AM
Subject: [TekScopes] TDS540 Calibration Procedure??


I acquired a TDS540 and TDS520.
Previous owner tried board swap and turned off calibration RAM
protection.
I changed all the electrolytics and cleaned the boards.
Now at least three
of the 4 boards seem to be working.
But calibration is all messed up.
Passes power up self-test, but fails Signal Path compensation.
There's a slew of error messages in the logfile.
So far, I've verified that the input attenuators are working.
Beyond that, when the signal disappears into an undocumented board,
things get much harder.

The most obvious symptom is that when changing the vertical
position, the trace moves at a rate that's about twice the rate
that the (ground reference) arrow on the left edge of the screen moves.

It's the same on both acquisition boards. All channels have the
same symptom.
I'm making the rash assumption (wishful thinking) that recalibrating the
insturment will fix this.

The service manual has a lot of performance verification info, but
the actual calibration procedure goes like this, "insert the
TDS 500B and 700A Field Adjustment Software
calibration disk into your GPIB PC and follow instructions..."
Not much help.
These appear to be vanilla (not A or B) versions of the 520/540
if that matters to the calibration sw version.

Is there an available field procedure that would let me cal the
TDS540 using manually controlled sources? There's a set of "cal"
commands in the programmer's reference manual that claim to step
thru something related to calibration, but that's all I can determine.

I could borrow a NI GPIB card and run the cal sw IF I could get my
hands on it. If I needed GPIB calibration sources, I'd be hard pressed
to get my hands on that...maybe a CG551AP could be borrowed, if that
would do it.

Help!!!


One of the processor boards has an additional problem.
When it's booting, it fails to display the stairstep pattern that's
typical of the series. Then it puts up the horizontal position
indicator on the top line of the screen...looks like this:

|__________________|

Then it locks up with the two frontmost segments of the 7-segment
led flashing alternately. Swapping the ROM didn't help.
Same problem in both mainframes with either acquisition board.
Ideas on a process to determine how to fix this?

Thanks, mike








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