Leo: Very fine work....haved designed SMPS since 1970s...and debugged 246x PSU....
1/ Virtually all SMPS have UVLO and OVLO = undervoltage and overvoltage lockout, the input V is sensed and switching inhibited till the DC bus is in range.
I have never had issues in using a variac to test SMPS. Use of Variac reduces chances of blowups if a part has a short.
2/ These are indeed complex designs but very reliable. The flowchart and debug procedures in the TEK serv manual are excellent.
3/ Blow switch transistors will often be symptoms of other issues and the driver IC or transistors in the switch circuit are at risk.
4/ There was discussion of the proper loads and connectors for dummy testing..long ago.
5/ I have indeed used a DC bus from a variable lab supply to test these, but this is rather dangerous and the lab supply current limit will not guarantee safety if the SMPS has faults!
6/ Besides RIFA X/Y line caps, all lytics (ELCO) can be at risk, especially in the LV rewct section. The HV bus caps (360V bus) seldom fail.
7/ The schematics PCB layout have a reversal of two caps in the LV rect section, that can result in problems when recapping.
8/ The rectifiers and switch transistors are easy to check in circuit.
Hope this note is of use,