Re: Historical Analog Scope Triggering Techniques
That or a CPLD, which has less capability and less cost. They're easier to use if you're making your own boards, but you'll need a programmer, so additional cost. Remember that while a CPLD has non volatile memory for the configuration, most FPGAs don't. That should be included on the development board, and if you're lucky, so will the programmer. Typical FPGA downloads a pass through program into the FPGA, uses it to program the memory, then programs the FPGA from the external memory. That reprogramming is automatic (or can be) when power is applied to the board.toggle quoted messageShow quoted text
You'll want to program in either VHDL or Verilog, although I personally prefer VHDL.
A critical part of the design is that regardless of CPLD or FPGA, the I/O voltages are ONLY 3.3 volts, and you *must* level translate. There are chips good for that, though, and you only need one way.
An arduino, touchscreen display, programming, and some sort of interface to the CPLD/FPGA would set up triggering conditions. Do note that the FPGA can support a more complex (I2C or SPI) interface, and THAT needs to be level translated too.
The simpler design would be some dipswitches, 74LS86, 74LS30. One switch for 1/0, one switch for "don't care". But where'd be the fun in that?
On 12/4/2020 9:30 AM, firstname.lastname@example.org wrote:
On 2020-12-04 2:31 a.m., Jeff Dutky wrote:Okay, this is all in line with what I've been thinking about: building a little box that can raise a TTL output on various conditions like a specific counter bit, or having a 16 bit input value between two selected values, or when certain bits are set or cleared, etc. It seems like this would make all kinds of things visible on a simple analog scope at relatively little cost (assuming that you don't want to do the triggering at clock rates much above a few tens of MHz, of course).I would consider a tiny FPGA rather than discrete TTL, which would give