I have followed this discussion with great interest. However, I have always had difficulty understanding how to design for optimum bias for a FET source follower. In this application, the input of Tek2215A, you want this buffer to have infinite input impedance, small input capacitance, a gain close to one, and finally low output impedance. You will have a low gm, typical for FETs, which will give you a fairly high output impedance typically 300ohm which motivates the need for an additional transistor emitter follower which will reduce the output impedance further to drive the following circuitry.
With this background I get the impression that the choice of FET is not very critical. The only parameter that you can design for is now the current Id. In this design the Id is set by R126, 200ohm, to 10mA. This means that Idss shall be 15mA or higher?
The purpose of feedback through opamp U120 is to keep Q133 emitter at +0.4V, then the circuit is balanced. This is the temperature drift compensation. Ok so far, but how does the choice of FET current Id make any difference at all?
Back to the original issue I think you have a bad FET, a bad U120 or a bad solder joint.