Re: Purpose of Q32 in S-52
What is “digilog”?
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On Jul 7, 2020, at 17:32, Ed Breya via groups.io <email@example.com> wrote:
Curiosity forced me to look at the S-52 schematics. I think Q32 is to prevent possible latch-up of the digilog circuitry during power-up. There are quite a few things going on back and forth, and with varying levels. so I can picture it maybe getting stuck during initial activation. while the supplies (including the shunt-regulated -5.1V) slew up at various rates. and the clocking system state is undefined. This is unpredictable in a mainframe, for example, with widely varying plug-in loads and combinations. It looks like once the oscillator and state control decoding are running, it should clear and cycle properly, but there may be some quasi-digilog state where the bias is partly on and the circuit is confused. I'd consider it a "power-up reset" function for now.
It could also protect against loss (permanent or temporary during power-up) of the -12.4V supply. In this event, Q32 will pull the control line down, forcing the TD bias current steering stage to dump it into ground rather than the TD. This forces a reset, regardless of the rest of the functions.
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