Re: 7L5 dot frequency reset bug - any clues or a fix?


Nenad Filipovic
 

Hi Dan,

Excellent analysis. I'm puzzled by the design of the level shifter
consisting of R841, C841, VR840 and R839. Assuming both SERIAL CLK and TS1
inputs have internal pull-ups to 5V, then mainframe TS1 pulses should be
able to pull SERIAL CLK much lower than 4V in steady state operation. Did
you make your measurement exactly at turn-on, thus recording the true
transient response? R841-C841 time constant is 1.38s, therefore this level
shifter would fail if not given enough time for C841 to charge. This would
also explain your observation that 7L5 resets properly if you wait only 4s
after powering down your 7854.

Best Regards,
Nenad

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