Add a pin 1 marker (small triangle) to J4...J10. It might same someone a lot of trouble.
toggle quoted messageShow quoted text
If +8_11.5VDC is max 11.5VDC then the voltage on TTL_HIGH can be max 7V, way too high for TTL.
Better use a 5.6V zener instead of R2.
On 2020-02-12 23:20, Ke-Fong Lin wrote:
The PCB is ready! I've updated the preview and the
particular, I've added a small circuitry to generate the "power good
signal" for the TM5000 modules.
It's basically a voltage divider from 8V
to 5V, and an NPN buffer. The PWR specifies a full load (16mA) of TTL high
A small drawback is that it always draws around 2-3mA even if not
to needed (inserted in a mainframe).
Can some of you do a review of the
schematic? Or give some comments or suggestions?
For those really curious,
I can send the complete kicad project, just ask. Final version will be an
github of course.
For a pure extender use, there is just some wiring to be
done. Otherwise, I'll have to provide some sort of BOM.
I also have to
write a small "documentation".
Plan is to send the PCB to fabrication
(JLPCB) this week-end, after feedbacks.