On Mon, Jul 15, 2019 at 12:48 AM, walter shawlee wrote:
Prescalers like these are built using flip-flops that each divide by two. With 3 stages, you divide by 2^3 (8), with 4 stages, you divide by 2^4 (16), *unless* you use a mechanism to detect a special count value, like 10, and acting on that. You need much faster logic to detect such an intermediate value and reset the chain "at 10":
At the time, flip-flops were barely fast enough to keep up at 1.3 to 1.6 GHz, so resetting at intermediate values was out of the question. Bear in mind that the input signal had to ripple through the flip-flops, before detection/decoding of an intermediate count could be done, which would not happen until after the ripple-through was done.
More modern counters also have (internal) prescalers dividing by integer powers of 2, like the (3 GHz - 12 GHz) prescalers for the well-known HP 53131/53132 family of counters. The firmware in the counter corrects the value to be displayed.
Not much difference, just newer, faster technology.