Yes, I checked the var.tim/div pot and it is in the full CW detent, thus closing S1070A. However, even if it was out of its detent it would still get some amount of voltage from R1070, right? I can see the voltage drop from +.182VDC down to +.172VDC when I turn the var.tim/div pot down to it's lowest level, so that pot appears to be working. It does what it's supposed to with a signal, too.
Sorry about the PS vs P5. That happens when you get old and don't have the right glasses on! Yes, PS-5 and PS-7 should be P5-5 and P5-7...Sorry all.
I'm pretty confident I understand the set of series resistors and switches that open and close based on the time setting. I'm just wondering about two things:
First, I'm wondering about the low +.182VDC instead of +.6VDC on the P5-7/J5-7 line in the .1mS setting (manual's test setup.) Theory: Dirty switch #8 and/or #14. A dirty switch #8 would affect all time bases unless the switch's increased resistance isn't enough to affect it as bad when the 1M R1084 and 806K R1083 isn't added in. However, switch 7 bypasses switch 8 (switch 7 and 8 are never closed at the same time) and all the resistors and sends 50V to straight to R1082. If I put it in any of the time settings that close switch 7 and open switch 8 I still get the low +.182VDC.
Second, I'm also wondering why the +.182VDC on P5-7 (which is out of spec to begin with) goes to 0VDC when I select 50ms. None of the other problematic time settings drop to zero on that line. Theory: Open/dirty switch #9, open R1083 and/or R1084. However, if I set the time to .5uS (a problematic time setting) that
opens switch #15, closes switch #14, closes switch #9, and opens switch
#8. This feeds 50V through all the resistors, switch #9 and back through switch #14 to P5-5 but I still get -.556VDC on
P5-5 on that setting. That means switch #9 and R1083 and R1084 are not open and not dirty enough to bring the .6VDC out of spec. If R1083, R1084, or switch #9 were open I wouldn't get that voltage.
So, I can't, for the life, of me figure out why I only have .182VDC on the P5-7/J5-7. I also checked Q974 and Q980's voltages and they are in spec. I even swapped each of Q974 and Q980 with other like components and get the same results. And yet, even with that voltage way out of spec on all the time base settings, most of the time bases, other than the four non-working ones, appear to work normally. Is there another part of the schematic I should be looking at? The similar set of series resistors in the delay sweep portion of the main cam has all the right voltages. P6-12/J6-12 has +14.50VDC and P6-6/J6-6 reads +.696VDC, right on spec.
Thanks for any help anyone can provide.
Date: Thu, 5 Nov 2015 17:32:05 -0800
Subject: [TekScopes] Re: 475 Time Base Setting Problem
> I want to have good evidence that I'm headed to the right place
> before I go in that far.
I fully agree.
BTW, are you sure the var. tim/div pot is fully CW, so SW1070A closed? If not, no 50 V on R1082.
the integrator timing was incorrect. Please ignore it:
From faster to slower times, resistors
(60k2 + 60k2 (2x)
(60k2 + 60k2 + 180k6) (5x)
(60k2 + 60k2 + 180k6 + 301k) (10x)
(60k2 + 60k2 + 180k6 + 301k + 602k) (20x)
(60k2 + 60k2 + 180k6 + 301k + 602k + 1890k) (50x)
are switched in. A switch position that stays open breaks the chain. S9 breaks the chain from 1M2 to 3M total chain resistance, which is every *two* decades (two decades per resistor-"cycle"). Simple.
Detail: You mention PS-5 and PS-7. To avoid confusion: It's P5-5 and P5-7. Tek always (?) used these Pn - Jn sets.
What I said before about the high resistance value not being consistent with
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