Do not mind about the board.
Additional functions/devices are into sleep mode or disabled completely. If you can do this measurement, stick with relative measurements between the 2 firmwares.
You are right.
Manually downgrading the Etherkit implementation's PLL frequency to the minimum allowed (600MHz) saves another 2mA. This is done with a simple command :
si5351.set_freq_manual(1409717000ULL, 60000000000ULL, SI5351_CLK0);
But after doing the math, the OE1CGS sketch reveals that it sets the PLL frequency much higher, at ~874MHz, while consuming less power.