Re: Si5351 current consumption #chat
Shirley Dulcey KE1L
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Power consumption of CMOS logic depends on operating frequency; the higher the frequency, the more power that is used. CMOS gates use almost no power in either saturated state (on or off), but consume more during transition between the states. Gates cannot switch in zero time; increased frequency means that a larger percentage of time is spent in the non-saturated state, therefore more power.
The two libraries are probably choosing different combinations of PLL and divider settings, with Etherkit going for a higher PLL frequency. That would account for the difference in power consumption that you are seeing, as it would lead to higher power consumption in both the PLL and the dividers.
On Sat, Mar 14, 2020 at 9:48 AM Eduard Voiculescu <yo9ict@...> wrote: