Topics

RF out with RF OFF: Clock feed through

Nick Kennedy
 

Got an email from Ignacio EB4APL where he talks about RF output still existing with RF OFF in effect. He says it’s the 30 MHz oscillator and/or the 180 MHz clock that results from the x6 multiplication in the AD9851 that comes through. I verified it with a couple of readings using my hardware.


I thought I’d check at two frequencies and arbitrarily chose 3.5 MHz and 30 MHz. It didn’t make much difference though.


My floor with things hooked up but no RF input is about -72 dBm. 


Here with the DDS output connected to the AD8307 box' input:

  

MHz

RF ON

dBm

RF OFF

dBm

3.5

0.1

-44.9

30

-0.1

-43.0

 

So with RF OFF, I have output that’s about 27 dB higher than my measurement floor but 44 dB lower than my RF ON output level.


Ignacio says that a spectrum analyzer shows a small pip at 30 MHz and a larger one at 180 MHz. He and I are both using DDS-60 boards.


Of course, we don’t do measurements with RF OFF, but assuming that the spurs are present when RF is ON, they could have an effect. Ignacio points out that this thing shouldn’t affect measurements of lowpass and bandpass filters or crystals, but could affect highpass filter measurements.


Now I wonder what people see with eBay boards and custom filters, both with AD9850 and AD9851 chips.  Anyone?


Regarding  the “RF OFF” function, it’s accomplished by setting the DDS frequency to zero. 


**


Otherwise, there hasn't been a lot of work on the PHSNA software on either side of the Atlantic for some time. However, there are still some nice improvements by Ignacio in the pipeline. I think we've got log scale graphs with some user options to come. Also, improved handling of baud mismatches between the Arduino and PC, plus a system that will allow changing PHSNA message and button labeling text for non-English users.


Hope to have it out in a week or so.


73-


Nick, WA5BDU

EB4APL
 

Hi,

I must say that the feedthrough issue was discovered by Camille Farrougia, F4IBA, who emailed me about this. He is also building the French language support file. As Nick says, the forthcoming version will have multilingual support, the user will be able to make his own translation.

Regards,

Ignacio, EB4APL


El 09/07/2017 a las 15:19, Nick Kennedy kennnick@... [PHSNA] escribió:
 

Got an email from Ignacio EB4APL where he talks about RF output still existing with RF OFF in effect. He says it’s the 30 MHz oscillator and/or the 180 MHz clock that results from the x6 multiplication in the AD9851 that comes through. I verified it with a couple of readings using my hardware.


I thought I’d check at two frequencies and arbitrarily chose 3.5 MHz and 30 MHz. It didn’t make much difference though.


My floor with things hooked up but no RF input is about -72 dBm. 


Here with the DDS output connected to the AD8307 box' input:

  

MHz

RF ON

dBm

RF OFF

dBm

3.5

0.1

-44.9

30

-0.1

-43.0

 

So with RF OFF, I have output that’s about 27 dB higher than my measurement floor but 44 dB lower than my RF ON output level.


Ignacio says that a spectrum analyzer shows a small pip at 30 MHz and a larger one at 180 MHz. He and I are both using DDS-60 boards.


Of course, we don’t do measurements with RF OFF, but assuming that the spurs are present when RF is ON, they could have an effect. Ignacio points out that this thing shouldn’t affect measurements of lowpass and bandpass filters or crystals, but could affect highpass filter measurements.


Now I wonder what people see with eBay boards and custom filters, both with AD9850 and AD9851 chips.  Anyone?


Regarding  the “RF OFF” function, it’s accomplished by setting the DDS frequency to zero. 


**


Otherwise, there hasn't been a lot of work on the PHSNA software on either side of the Atlantic for some time. However, there are still some nice improvements by Ignacio in the pipeline. I think we've got log scale graphs with some user options to come. Also, improved handling of baud mismatches between the Arduino and PC, plus a system that will allow changing PHSNA message and button labeling text for non-English users.


Hope to have it out in a week or so.


73-


Nick, WA5BDU


Alfredo Mendiola Loyola
 

Try putting a low pass filter of 30mhz at the output of the dds-60. The amplifier of the dds60 also adds harmonics.

OA4AJP

EB4APL
 

This is exactly what I did, I have a connectorized 30 MHz LP filter and I inserted it between the input and the output of the PHSNA. This time it is not a harmonic problem, it is the 180 MHz refclock frequency which is not well filtered out.

Ignacio, EB4APL


El 09/07/2017 a las 18:44, mendiola_loyola@... [PHSNA] escribió:
 

Try putting a low pass filter of 30mhz at the output of the dds-60. The amplifier of the dds60 also adds harmonics.

OA4AJP


Posted by: mendiola_loyola@...

Clifford Heath
 

Filtering is the wrong solution here. You need to fix the problem at the source.

The evaluation board (and the Chinese clones) use asymmetrical outputs,
with one DAC output terminated to ground and one to the filter. The output
of this kind of DAC is fully differential current-steering, and you cannot get
good performance by taking one side to ground.

Instead, you should fit a transformer or a suitable op-amp (with good CMMR)
to subtract the two outputs. You can see this in the schematic for the AD9959
evaluation boards. Note that the transformers they use there are $10/each,
so the Chinese boards generally don't provide them, or only provide 2 of the
four channels.

Alternatively, here's a cheap op-amp that'd do the job:
<http://www.analog.com/en/products/amplifiers/operational-amplifiers/high-speed-amplifiers-bandwidth-greaterthanequalto-50mhz/ad8055.html>
Use a normal differencing setup (four resisters) and feed the output into the
filter.

Clifford Heath.

On 10 Jul 2017, at 3:10 AM, EB4APL eb4apl@... [PHSNA] <PHSNA@...> wrote:


This is exactly what I did, I have a connectorized 30 MHz LP filter and I inserted it between the input and the output of the PHSNA. This time it is not a harmonic problem, it is the 180 MHz refclock frequency which is not well filtered out.

Ignacio, EB4APL


El 09/07/2017 a las 18:44, mendiola_loyola@... [PHSNA] escribió:

Try putting a low pass filter of 30mhz at the output of the dds-60. The amplifier of the dds60 also adds harmonics.

OA4AJP

Posted by: mendiola_loyola@...

EB4APL
 

The 180 MHz component is intrinsic to the DDS design, any frequency generated by the DDS is sampled by the 180 MHz reference clock. Maybe you are right and this type of connection causes the DAC to output more clock energy that should be.  Probably using the transformer or the opamp the clock component will be reduced but a trap at 180 MHz could suffice. In fact my external 30 MHz LPF removes the clock (leakage or whatever) quite well.

Regards,

Ignacio, EB4APL


El 10/07/2017 a las 1:29, Clifford Heath clifford.heath@... [PHSNA] escribió:
 

Filtering is the wrong solution here. You need to fix the problem at the source.

The evaluation board (and the Chinese clones) use asymmetrical outputs,
with one DAC output terminated to ground and one to the filter. The output
of this kind of DAC is fully differential current-steering, and you cannot get
good performance by taking one side to ground.

Instead, you should fit a transformer or a suitable op-amp (with good CMMR)
to subtract the two outputs. You can see this in the schematic for the AD9959
evaluation boards. Note that the transformers they use there are $10/each,
so the Chinese boards generally don't provide them, or only provide 2 of the
four channels.

Alternatively, here's a cheap op-amp that'd do the job:

Use a normal differencing setup (four resisters) and feed the output into the
filter.

Clifford Heath.

> On 10 Jul 2017, at 3:10 AM, EB4APL eb4apl@... [PHSNA] wrote:
>
>
> This is exactly what I did, I have a connectorized 30 MHz LP filter and I inserted it between the input and the output of the PHSNA. This time it is not a harmonic problem, it is the 180 MHz refclock frequency which is not well filtered out.
>
> Ignacio, EB4APL
>
>
> El 09/07/2017 a las 18:44, mendiola_loyola@... [PHSNA] escribió:
>>
>> Try putting a low pass filter of 30mhz at the output of the dds-60. The amplifier of the dds60 also adds harmonics.
>>
>> OA4AJP
>>
>> Posted by: mendiola_loyola@...
>
>
>


Posted by: Clifford Heath


Clifford Heath
 

On 10 Jul 2017, at 10:06 AM, EB4APL eb4apl@... [PHSNA] <PHSNA@...> wrote:
The 180 MHz component is intrinsic to the DDS design, any frequency generated by the DDS is sampled by the 180 MHz reference clock.
In theory the elliptical filter fitted is -91dB at 180MHz, so if it wasn't for
low-quality components being used, there shouldn't be any. Unless it's
getting in some other way... It's so far from the passband that it should
be easy to deal with anyhow.

But 30MHz? That's right in the clear. If you do not want a notch there,
the best solution is not to produce any 30MHz. There *will* be 30MHz
in the ground plane, and there is nothing to stop it appearing at the
output. Differential coupling will reduce it dramatically.

I guess AD figure that the sort of person who cares, will not be the kind
who need to buy an evaluation board...

Clifford Heath.

Maybe you are right and this type of connection causes the DAC to output more clock energy that should be. Probably using the transformer or the opamp the clock component will be reduced but a trap at 180 MHz could suffice. In fact my external 30 MHz LPF removes the clock (leakage or whatever) quite well.

Regards,

Ignacio, EB4APL


El 10/07/2017 a las 1:29, Clifford Heath clifford.heath@... [PHSNA] escribió:

Filtering is the wrong solution here. You need to fix the problem at the source.

The evaluation board (and the Chinese clones) use asymmetrical outputs,
with one DAC output terminated to ground and one to the filter. The output
of this kind of DAC is fully differential current-steering, and you cannot get
good performance by taking one side to ground.

Instead, you should fit a transformer or a suitable op-amp (with good CMMR)
to subtract the two outputs. You can see this in the schematic for the AD9959
evaluation boards. Note that the transformers they use there are $10/each,
so the Chinese boards generally don't provide them, or only provide 2 of the
four channels.

Alternatively, here's a cheap op-amp that'd do the job:
<http://www.analog.com/en/products/amplifiers/operational-amplifiers/high-speed-amplifiers-bandwidth-greaterthanequalto-50mhz/ad8055.html>
Use a normal differencing setup (four resisters) and feed the output into the
filter.

Clifford Heath.

On 10 Jul 2017, at 3:10 AM, EB4APL eb4apl@... [PHSNA] <PHSNA@...>wrote:


This is exactly what I did, I have a connectorized 30 MHz LP filter and I inserted it between the input and the output of the PHSNA. This time it is not a harmonic problem, it is the 180 MHz refclock frequency which is not well filtered out.

Ignacio, EB4APL


El 09/07/2017 a las 18:44, mendiola_loyola@... [PHSNA] escribió:

Try putting a low pass filter of 30mhz at the output of the dds-60. The amplifier of the dds60 also adds harmonics.

OA4AJP

Posted by: mendiola_loyola@...


Posted by: Clifford Heath <clifford.heath@...>

Alfredo Mendiola Loyola
 

In the evaluation board on output is connected to the low pass filter and the other to the equivalent output impedance of 100 Ohm.

In my  Design on output goes to the 50 ohm  low pass filter and the other
output to a 25 Ohm resistor which the equivalent output impedance 50 || 50.

73s
OA4AJP

Clifford Heath
 


On 10 Jul 2017 2:21 PM, "mendiola_loyola@... [PHSNA]" <PHSNA@...> wrote:
 

In my  Design on output goes to the 50 ohm  low pass filter and the other

output to a 25 Ohm resistor which the equivalent output impedance 50 || 50. 

Sorry, but that makes no sense. The DDS output is a current - i.e. high impedance. The two currents both come from one constant current source, steered more into one output or the other. That's how these DACs work. It doesn't matter much what impedance they see, but they should look into exactly the same impedance. Not one output into a resistor, the other into a filter. That's a recipe for picking up spuria and noise. 

Clifford Heath 


73s
OA4AJP



Alfredo Mendiola Loyola
 

Clifford,
I just used the setup of the datasheet. The dds60 also use a 25 ohm on one of the current outuputs.
I didn,t know that it is a bad setup.

Regards
Alfredo
OA4AJP

Clifford Heath
 

On 10 Jul 2017, at 9:15 PM, mendiola_loyola@... [PHSNA] <PHSNA@...> wrote:
I just used the setup of the datasheet. The dds60 also use a 25 ohm on one of the current outuputs.
I didn,t know that it is a bad setup.
I'm looking at the AD9851 data sheet from
<http://datasheet.octopart.com/AD9851BRSZ-Analog-Devices-datasheet-56122.pdf>

For IOUTB on page 5, it says:
"Output load should equal that of IOUT for best SFDR performance."
That means matched (complex) impedance - for the reasons I've outlined already.
At any frequency where the loads are mismatched, the signals will become asymmetric
and will show spurs that don't need to be there, especially clock spurs (and probably
also noise from any SPI communication, too).

Figure 9, page 11, has the comment:
"The differential DAC output connection in Figure 9 enables reduction of common-mode signals"
... and goes on to talk about needing source termination to drive reactive filters
(otherwise the IOUT and IOUTB loads are too different!)

On the top of the second column on page 17 it says that the eval board filter is designed
for 200 ohm input and output impedances. Which is strange, because the SMA connector
fitted is a 50 ohm type...

The data sheet schematic shows 25 and 50 ohms because it assumes that you will connect
a 50 ohm spectrum analyser on the connector, which will parallel with the 50 ohms to give
a matching 25 & 25 ohm load on IOUT and IOUTB.

If you're going to connect a filter at IOUT, then it will not have a pure 50 ohm (S11 will be
reactive) so the data sheet schematic is not applicable.

The point of all of this is that the load (complex load impedance) should be matched between
IOUT and IOUTB. The Chinese modules *do not do this* and will not produce best SFDR
performance. They just cloned the EVB, removing the jumper points that allow you to set it
up the way you want, because they don't have any understanding of what is quite clearly
stated in the data sheet. I don't know how much more I can say on this, except... read the
data sheet! It's all there in black and white.

Clifford Heath.

Terry Fox
 

Perhaps a better way to turn OFF the RF would be to put the DDS chip in sleep mode, NOT to just program it to 0Hz.  IIRC, putting it to sleep also powers down the internal clock multiplier (AD9851).
73, Terry, N4TLF

Alfredo Mendiola Loyola
 

With the bit W39 "Power Down" on the 40 bit register ?

Nick Kennedy
 

Yes, I think I looked at that while trying to produce the RF ON/OFF function, but IIRC there's a way to tell it to sleep, but once done you can't wake it back up quickly without going through the normal startup routines, possibly even powering off and back on.

73-

Nick, WA5BDU


On Mon, Jul 10, 2017 at 3:28 PM, wb4jfi1@... [PHSNA] <PHSNA@...> wrote:
 

Perhaps a better way to turn OFF the RF would be to put the DDS chip in sleep mode, NOT to just program it to 0Hz.  IIRC, putting it to sleep also powers down the internal clock multiplier (AD9851).
73, Terry, N4TLF


K5ESS
 

Have you tried opening the Rset pin on the AD9850?  The resistance between this pin and ground sets the DAC full scale output current with the relationship Iout = 32(1.148 V/Rset)  Doesn’t say what  “V” but with Rset = infinity (open circuit) the current should be zero and no output.  Rset is nominally 3.9K ohms for a max current of 10 mA.  Don’t know what version of the AD9850 board you’re using but if it’s the one with three rows of seven pins you can just remove J3.  If it’s the one with two rows of ten pins there is no jumper, just a 3.9K SMD resistor soldered to ground.

Mike

K5ESS

 

From: PHSNA@... [mailto:PHSNA@...]
Sent: Monday, July 10, 2017 6:44 PM
To: PHSNA@...
Subject: Re: [PHSNA] Re: RF out with RF OFF: Clock feed through

 

 

Yes, I think I looked at that while trying to produce the RF ON/OFF function, but IIRC there's a way to tell it to sleep, but once done you can't wake it back up quickly without going through the normal startup routines, possibly even powering off and back on.

 

73-

 

Nick, WA5BDU

 

 

On Mon, Jul 10, 2017 at 3:28 PM, wb4jfi1@... [PHSNA] <PHSNA@...> wrote:

 

Perhaps a better way to turn OFF the RF would be to put the DDS chip in sleep mode, NOT to just program it to 0Hz.  IIRC, putting it to sleep also powers down the internal clock multiplier (AD9851).

73, Terry, N4TLF

 

 

EB4APL
 

The problem that we are dealing with is the 180 MHz clock feedthrough in the output. It was discovered when turning the RF off, but it is present with the same amplitude when it is on, where it matters. RF is turned off for special purposes only, not while measuring, and for me it is ok as is.

BTW, I plan to test the transformer method, as indicated by Clifford and also used in some versions with the Chinese modules and in the experimenters board. I have to get a Minicircuits T1-1T transformer for best results, and this will not happen until September.

73 de Ignacio EB4APL


El 10/07/2017 a las 22:28, wb4jfi1@... [PHSNA] escribió:
 
Perhaps a better way to turn OFF the RF would be to put the DDS chip in sleep mode, NOT to just program it to 0Hz.  IIRC, putting it to sleep also powers down the internal clock multiplier (AD9851).
73, Terry, N4TLF


Posted by: wb4jfi1@...

Nick Kennedy
 

While reading the emails this morning I remembered that I do have one of the eBay / Chinese AD9851 boards up and running. My previous data was from the DDS-60 board.

The additional DDS I have is in an "Experimenter's DDS" board described by N5IB in this group's files area. So I thought I'd try it and compare the results.

I did the test with the DDS on 10.1 MHz.

RF ON

RF OFF

MEAS FLOOR

-8.7 dBm

-66.7 dBm

-73.1 dBm

 

So the spurious output is 58 dB below the carrier in this case, compared with 43 dB in the case of the DDS-60.  The experimenter’s DDS uses a 5-element ladder filter (3-L, 2-C) following the eBay DDS.


Looking at my floor, I'd only lose 6.4 dB of dynamic range when measuring a HPF's response curve with this DDS.


As Ignacio said, turning the RF off is just a way to allow measuring the clock feed-through with our simple log power circuit. With a spectrum analyzer, that wouldn't be necessary.


BTW, I did a lot of programming on the Experimenter's DDS to make it a pretty useful instrument for me. My version is also described in the files area.


73-


Nick, WA5BDU





On Sun, Jul 9, 2017 at 8:19 AM, Nick Kennedy <kennnick@...> wrote:

Got an email from Ignacio EB4APL where he talks about RF output still existing with RF OFF in effect. He says it’s the 30 MHz oscillator and/or the 180 MHz clock that results from the x6 multiplication in the AD9851 that comes through. I verified it with a couple of readings using my hardware.


I thought I’d check at two frequencies and arbitrarily chose 3.5 MHz and 30 MHz. It didn’t make much difference though.


My floor with things hooked up but no RF input is about -72 dBm. 


Here with the DDS output connected to the AD8307 box' input:

  

MHz

RF ON

dBm

RF OFF

dBm

3.5

0.1

-44.9

30

-0.1

-43.0

 

So with RF OFF, I have output that’s about 27 dB higher than my measurement floor but 44 dB lower than my RF ON output level.


Ignacio says that a spectrum analyzer shows a small pip at 30 MHz and a larger one at 180 MHz. He and I are both using DDS-60 boards.


Of course, we don’t do measurements with RF OFF, but assuming that the spurs are present when RF is ON, they could have an effect. Ignacio points out that this thing shouldn’t affect measurements of lowpass and bandpass filters or crystals, but could affect highpass filter measurements.


Now I wonder what people see with eBay boards and custom filters, both with AD9850 and AD9851 chips.  Anyone?


Regarding  the “RF OFF” function, it’s accomplished by setting the DDS frequency to zero. 


**


Otherwise, there hasn't been a lot of work on the PHSNA software on either side of the Atlantic for some time. However, there are still some nice improvements by Ignacio in the pipeline. I think we've got log scale graphs with some user options to come. Also, improved handling of baud mismatches between the Arduino and PC, plus a system that will allow changing PHSNA message and button labeling text for non-English users.


Hope to have it out in a week or so.


73-


Nick, WA5BDU


Alfredo Mendiola Loyola
 

Is the use of the transformer at the output the only solution to avoid the 180 mhz clock  feedthrough in the output ?

I understand that the DDS-60 has the same problem because it doesn't use a transformer at the output.

73.
Alfred
OA4AJP

EB4APL
 

I don't think so. The transformer reduce it a lot, as per Clifford explanations, but a suitable filter works also. And using the transformer and the filter (or trap) "could be" even better . I say "could" because at very low  levels the feedthrough could be caused by anything such as grounds, screening and so.

73 de Ignacio, EB4APL


El 11/07/2017 a las 15:31, mendiola_loyola@... [PHSNA] escribió:
 

Is the use of the transformer at the output the only solution to avoid the 180 mhz clock  feedthrough in the output ?


I understand that the DDS-60 has the same problem because it doesn't use a transformer at the output.

73.
Alfred
OA4AJP

Posted by: mendiola_loyola@...


Nick Kennedy
 

A filter with a steeper slop ought to help.  The transformer hasn't yet been shown to remove the clock signal.

Actually, the DDS-60 has more 180 MHz content than the AD9851 boards with outboard filtering. But individuals  may have done their filters differently, I suppose.

73,

Nick, WA5BDU


On Tue, Jul 11, 2017 at 8:31 AM, mendiola_loyola@... [PHSNA] <PHSNA@...> wrote:
 

Is the use of the transformer at the output the only solution to avoid the 180 mhz clock  feedthrough in the output ?


I understand that the DDS-60 has the same problem because it doesn't use a transformer at the output.

73.
Alfred
OA4AJP