Re: AD9850/51 module pc boards

Henning Weddig
 

Terry,

anohter idea:  i just read in an Analog Devices app note that the jitter of the reference clock has a large influence of the overlall jitter performance of the DDS. From my own experience a well regulated and low noise supply to the xtal osc and also TCXO will improve the phase nosie performance of the reference clock and therefore minimize the jitter.

The best known low noise regualtor is the LT3045-- unfortunately not cheap and sometimes hard to get due its large demand.  Another idiea ist o use a "super cap" i.e. an emitter follower with a large cap from the the base to ground. This cap will be multipleid wth the hfe of the transistor.

I had the idea for a piggy back pcb on the chinese units, but never tried. See the attached schematic file.

Henning


Am 30.09.2018 um 05:34 schrieb Terry VK5TM:

Updated pics with the 3.3v reg underneath the Xtal osc.

I have moved some things around to shorten the length of tracks between IC output, transformer and pin at the edge of the pcb.

Will leave this alone for a day or two, firstly so any comments can be added/updated and secondly, I find getting away from a design sometimes suggests improvements that can be made or something shows that has been missed (like a power track missing in the first set of pics).

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