Re: i2c encoders in matrix with I/O #ubitx

Tom, wb6b
 

It looked like they mapped 256 I2C address to the various internal registers and the EEPROM. Then had an additional 7 bits of high order I2C addresses. There is an expanded I2C addressing scheme, greater than 7 bits, but I do not know how many libraries support it.

If what they actually did is create a bunch of pseudo registers, then you will need to deal with creating a protocol on top of the I2C protocol. Hope they provide drivers to layer on the pseudo register addressing and handshake, over the I2C protocol, if that is the case.

Tom, wb6b

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