si5351a CLK drive levels in uBITX #ubitx


I noticed that in both Ashar and Ian's uBITX code that the CLK outputs of the si5351a are being set to 4ma.

uint8_t  si5351bx_drive[3] = {1, 1, 1};  // 0=2ma 1=4ma 2=6ma 3=8ma for CLK 0,1,2

My understanding is that this translates to an output signal level of about 6dBm. 

What I have previously read is that most passive Double Balanced Diode ring mixers need a LO signal of 
7dBm or greater for optimal performance. 

Has anyone tried increasing one or more CLK output levels to 6mA to see what effect this has on receiver performance ?
A 6mA setting would translate to about 8dBm.

This would be an interesting experiment for someone with the necessary test equipment to verify whether this would be a positive
or a negative change. 


Michael VE3WMB 

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