Re: AGC circuit to try?
Jerry and all the other AGC enthusiasts:
first of all I would replace the first audio amp with an amp of
higher dynamic range, as this amp firstly limits the dynamic range
in the uBITY as in the BITX40.
I am still thinking of using a NE5534 (gain = 20 dB?) and
thereafter use a SSM2167 (or MAX9814?) as an audio processor with
Why that all?
About 38 years ago (spring 1980) I was a member of a design team for a main ship´s, communication receiver (10 kHz to 30 MHz) with a first IF of 63.078 MHz. The first mixer was a Mini Cirucuits SRA 3H. The IF port was terminated with two BF246B in common gate configuration-- unfortunately the P8000 was obsolete even at that time. Then a PIN diode attenautor (three diodes) was used in front of the rfirst xtal filter followed by a BF910 DG MOSFET gain stage. Unfortunately the inpurt return loss as a function of the attenaution for the PIN diode attenautor is not constant, which introduced some ripple in the passband.
The second IF was 5 MHz. For the gain stage we used MC1590 (in a TO99 case, wider temperture range as the MC1350).
I designed the "demodulator cassette" (last IF stage with a MC1590, delta gain = 40 dB, with some tricky AGC voltage linearisation; DSB-AM; SSB/CW demodulator with CA3028A, not the famous MC1496 ) including the AGC generation and audio preamp. For the AGC the RF was postamplified and a Plessey SL621 AGC long/short hang derivced circuitry built with opamps was used.
There was one problem: the feedthrough of te BFO voltage did introduce some AGC voltage even under no RF, but at that time did not matter much...
MC1350 users: please read the old app note for the MC1590, input and output iompedances must fullfill scertain conditions in order that the amp will not oscillate.
The "famous" G6LBQ clone of the BITX20 using this MC1350 chip showed on my build this self oscillation problem!!
The gain reduction scheme was as follows: the gain reduction started at -107 dBm (SSB bandwidth; 20 dB SINAD) and for my cassette ended at a gain reduction of 40 dB. Then the gain stages on the first and second mixers together gave an extra 80 dB gain reduction.
As the AGC performance was measured from the 20 dB SINAD point on (+30 dB) we never tested how the receiver behaves if 30 dB steps were introduced which will affect the gain stages (first and second mixer) in front of the filter bank. May be that also there problems can occur due to delays in the filter bank.
Concering the pregvious mentioned AGC stability problems:
in the next receiver design the AGC scheme was changed, i.e. the gain control was completely done before the filterbank, the AGC voltage generation still done in the demodualtor dassette (its amp had a fixed gain) and then the problems of an instable AGC started, when using narrow bandwidth (CW) filters which were behind the gain reduction stages. The reason is the "long delay" due to the narrow bandwidth of the filter.
The remedy was a so called "lead-lag" compensation-- EE´s may remember the associated control theory!
I am not a control theory specialist, so I can not defenitely say that the SSB filter in the UBITX will intorduce such a long delay in the step response if a PIN diode attenautor is uesed in the first IF, that the control loop must go unstable.
BTW: the four PIN diode attenautor originally comes from Hewlett Packard -- when they were in the semiconductor business, then taken over from other companies...
There must be a lot of variations concerning the control voltage range and component values, I remember that even on Microwaves & RF there was an article about it.
I remember that I also built a four diode PIN Diode attenautor, and ran into problems of not -constant return loss (S11). In addion I introduced a linearisation circuitry using opamps for the control voltage range to make it more "dB-linear". But as ohte rnoted, the inserteion losse even at minimum attanuationnis in the range of 2 to 3 dB.
Am 10.04.2018 um 20:29 schrieb Jerry Gaffke via Groups.Io: