From: BITX20@groups.io [mailto:BITX20@groups.io] On Behalf Of Jerry Gaffke via Groups.Io
Sent: Monday, January 8, 2018 11:25 AM
Subject: Re: [BITX20] fsk on si5351
Not obvious from reading the si5351 docs, so worth mentioning here:
I've found that writes to the multiple registers involved in the output multisynth are buffered,
only take affect only the last register is written to. If the frequency is changed between calls
to si5351bx_setfreq() by just a few hz, the transitions are very smooth, sounds
like an analog vfo sweeping through when heard on a receiver. Surprising, and very nice.
I'd expect the same sort of thing when writing to the PLL multisynth dividers,
though have not checked.
On Mon, Jan 8, 2018 at 07:57 am, Jerry Gaffke wrote:
The si5351bx routines change the output multisynth dividers when si5351bx_setfreq() is called,
the frequency of VCOA is left at 875mhz.